International Conferences

2011

  1. Zhibin Yang, Jean-Paul Bodeveix, Lei Pi, D. Ma, Jean-Pierre Talpin. Two formal semantics for a subset of the AADL. In UML&AADL workshop at the IEEE International Conference on Engineering of Complex Computer Systems, 2011. details
  2. Huafeng Yu, Y. Ma, Y. Glouche, J.-P. Talpin, L. Besnard and T. Gautier, P. Le Guernic, A. Toom, O. Laurent. System-level Co-simulation of Integrated Avionics Using Polychrony. In Proceedings of the 26th ACM Symposium On Applied Computing (SAC'11), 2011. details
  3. Jens Brandt, Michael Gemunde, Klaus Schneider, Sandeep Shukla, Jean-Pierre Talpin. Integrating System Descriptions by Clocked Guarded Actions. In Forum on Design Languages, September 2011. details
  4. Huafeng Yu, Jean-Pierre Talpin, Lo\"\ic Besnard, Thierry Gautier, Hervé Marchand, Paul Le Guernic. Polychronous Controller Synthesis from MARTE CCSL Timing Specifications. In ACM/IEEE Ninth International Conference on Formal Methods and Models for Codesign (MEMOCODE), Cambridge, United Kingdom, July 2011. details download
  5. Yue Ma, Huafeng Yu, Thierry Gautier, Jean-Pierre and Besnard, Lo\"\ic Talpin, Paul Le Guernic. System Synthesis from AADL using Polychrony. In Electronic System Level Synthesis Conference, June 2011. details pdf
  6. Virginia Papailiopoulou, Dumitru Potop-Butucaru, Yves Sorel, Robert De Simone, Loic Besnard, Jean-Pierre Talpin. From concurrent multi-clock programs to concurrent multi-threaded implementations. In Electronic System Level Synthesis Conference, San Diego, California, United States, June 2011. details download
  7. Adnan Bouakaz, Isabelle Puaut, Erven Rohou. Predictable Binary Code Cache: A First Step Towards Reconciling Predictability and Just-In-Time Compilation. In The 17th IEEE Real-Time and Embedded Technology and Applications Symposium, Chicago, United States, April 2011. details download
  8. Huafeng Yu, Yue Ma, Yann Glouche, Jean-Pierre Talpin, Loic Besnard, Thierry Gautier, Paul Le Guernic, Andreas Toom, Odile Laurent. System-level Co-simulation of Integrated Avionics Using Polychrony. In ACM Symposium On Applied Computing, TaiChung, Taiwan, Province Of China, March 2011. details download

2010

  1. Kenneth Johnson, Loic Besnard, Thierry Gautier, Jean-Pierre Talpin. A Synchronous Approach to Threaded Program Verification. In Proceedings of the 2010 10th International Workshop on Automated Verification of Critical Systems, AVOCS '10, Pages 168-183, 2010. details
  2. Yue Ma, Jean-Pierre Talpin, Thierry Gautier. Interpretation of AADL Behavior Annex into Synchronous Formalism using SSA. In Proceedings of the 2010 10th IEEE International Conference on Computer and Information Technology, Pages 2361-2366, 2010. details
  3. Julio C. Peralta, Thierry Gautier, Loic Besnard, Paul Le Guernic. LTSs for translation validation of (multi-clocked) Signal specifications. In Proceedings of the 2010 8th IEEE/ACM International Conference on Formal Methods and Models for Codesign (MEMOCODE), Pages 199-208, 2010. details
  4. Jean-Pierre Talpin, Julien Ouy, Thierry Gautier, Loic Besnard, Alexandre Cortier. Modular Interpretation of Heterogeneous Modeling Diagrams into Synchronous Equations Using Static Single Assignment. In Proceedings of the 2010 10th International Conference on Application of Concurrency to System Design, ACSD '10, Pages 137-146, 2010. details
  5. E. Vecchie, J.-P. Talpin, S. Boisgerault. A higher-order extension for imperative synchronous languages. In Software and Compilers for Embedded Systems, SCOPES'10, Pages 168-183, 2010. details
  6. Huafeng Yu, Jean-Pierre Talpin, Lo@c Besnard, Thierry Gautier, Frederic Mallet, Charles Andre, Robert De Simone. Polychronous Analysis of Timing Constraints in UML MARTE. In IEEE International Workshop on Model-Based Engineering for Real-Time Embedded Systems Design, Espagne Parador of Carmona, 2010. details

2009

  1. L. Besnard, T. Gautier, M. Moy, J.-P. Talpin, K. Johnson, F. Maraninchi. Automatic translation of C/C++ parallel code into synchronous formalism using an SSA intermediate form. In Ninth International Workshop on Automated Verification of Cirtical Systems (AVOCS'09), to appear in Electronic Communications of the EASST, 2009. details
  2. Y. Ma, J.-P. Talpin, S. Shukla, T. Gautier. Distributed simulation of AADL specifications in a polychronous model of computation. In International Conference on Embedded Software and Systems (ICESS'09), 2009. details
  3. J.C Peralta, T. Gautier. Towards SMV model checking of Signal (multi-clocked) specifications. In Ninth International Workshop on Automated Verification of Cirtical Systems (AVOCS'09), to appear in Electronic Communications of the EASST, Pages 171-185, 2009. details
  4. D. Potop-Butucaru, R. De Simone, Y. Sorel, J.-P Talpin. Clock-driven distributed real-time implementation of endochronous synchronous programs. In Embedded Software Conference (EMSOFT'09), 2009. details
  5. D. Potop-Butucaru, R. De Simone, Y. Sorel, J.-P. Talpin. From Concurrent Multiclock Programs to Deterministic Asynchronous Implementations. In Application of Concurrency to System Design (ACSD'09), 2009. details
  6. Y. Glouche, P. Le Guernic, J.-P Talpin, T. Gautier. A Boolean algebra of contracts for logical assume-guarantee reasoning. In 6th International Workshop on Formal Aspects of Component Software (FACS 2009), to appear in ENTCS (Electronic Notes in Theoretical Computer Science), November 2009. details
  7. Y. Glouche, J.-P. Talpin, P. Le Guernic, T. Gautier. A module language for typing by contracts. In Proceedings of the First NASA Formal Methods Symposium (NFM'09), E. Denney, D. Giannakopoulou, C. S. P\uas\uareanu (eds.), Pages 86-95, April 2009. details
  8. E. Vecchie, J.-P. Talpin, K. Schneider. Separate compilation and execution of imperative synchronous modules. In Design Analysis and Test in Europe (DATE'09), April 2009. details

2008

  1. Abdoulaye Gamatié, Thierry Gautier, Loïc Besnard. An Interval-Based Solution for Static Analysis in the SIGNAL Language. In Fifteenth IEEE International Conference and Workshops on the Engineering of Computer-Based Systems (ECBS 2008), Proceedings, Pages 182-190, Belfast, Northern Ireland, 2008. details
  2. B. Jose, S. Shukla, H. Patel, J.P. Talpin. On the automatic inference of synchronization logic for multi-threaded software synthesis from polychronous specifications. In ACM-IEEE Conference on Methods and Models for Codesign, 2008. details
  3. Y. Ma, J.P. Talpin, T. Gautier. Virtual prototyping AADL architectures in a polychronous model of computation. In ACM-IEEE Conference on Methods and Models for Codesign, 2008. details
  4. Hugo Metivier, Jean-Pierre Talpin, Thierry Gautier, Paul Le Guernic. Analysis of periodic clock relations in polychronous systems. In IFIP, Distributed Embedded Systems: Design, Middleware and Ressources (DIPES'08), Volume 271, Milano, September 2008. details

2007

  1. P. Bostrm, L. Morel, M. Walden. Stepwise development of Simulink models using the refinement calculus framework. In International Colloquium on Theoretical Aspects of Computing, 2007. details
  2. Lionel Morel, Louis Mandel. Executable Contracts for Incremental Prototypes of Embedded Systems. In Workshop on Formal Foundations of Embedded Software and Component-Based Software Architectures, 2007. details
  3. Julien Ouy, Jean-Pierre Talpin, Loïc Besnard, Paul Le Guernic. Separate compilation of polychronous specifications. In Formal Methods for Globally Asynchronous Locally Synchronous Design, 2007. details
  4. Sandeep Shukla, Sihed Suhaib, Deepak Mathaikutty, Jean-Pierre Talpin. On the polychronous approach to embedded software design. In Next generation design and verification methodologies for distributed embedded systems, 2007. details

2006

  1. S Suhaib, D Mathiakutty, Sandeep Shukla, Jean-Pierre Talpin. Polychronous methodology for system design, a true concurrency approach. In High-level design, validation and test workshop, IEEE Press, November 2006. details
  2. Christian Brunette, R Delamare, Abdoulaye Gamatié, Thierry Gautier, Jean-Pierre Talpin. A modeling paradigm for integrated modular avionics design. In Software Engineering and Advanced Application, IEEE Press, September 2006. details
  3. Jean-Pierre Talpin, Christian Brunette, Thierry Gautier, Abdoulaye Gamatié. Polychronous mode automata. In Embedded Software Conference, ACM Press, September 2006. details
  4. Loïc Besnard, Hervé Marchand, Eric Rutten. The Sigali Tool Box Environment. In WODES'06, 8th International Workshop on Discrete Event Systems, Sessions on Software Tools for DES, Ann Arbor, Michigan, USA, July 2006. details
  5. François Vernadat, Christian Percebois, Patrick Farail, R Vingerhoes, Alain Rossignol, Jean-Pierre Talpin, David Chemouil. The Topcased project - a toolkit in open-source for critical application and system development. In International Space System Engineering Conference, Eurospace, May 2006. details
  6. Christian Brunette, Jean-Pierre Talpin, Loïc Besnard, Thierry Gautier. Modeling multi-clocked data-flow programs using the Generic Modeling Environment. In Synchronous Languages, Applications, and Programming, Elsevier, March 2006. details
  7. Abdoulaye Gamatié, Thierry Gautier, Paul Le Guernic. Toward Static Analysis of SIGNAL Programs using Interval Techniques. In Synchronous Languages, Applications, and Programming, SLAP 2006, Florence Maraninchi, Marc Pouzet (eds.), Vienna, Austria, March 2006. details
  8. Hamoudi Kalla, Jean-Pierre Talpin, David Berner, Loïc Besnard. Automated translation of C/C++ programs into a synchronous formalism. In Engineering of Computer Based Systems, IEEE Press, March 2006. details

2005

  1. Jean-Pierre Talpin, Sandeep Shukla. Automated clock inference for stream function-based system level specifications. In High-level design, validation and test workshop (HLDVT), IEEE Press, 2005. details
  2. Jean-Pierre Talpin, Dimitru Potop-Butucaru, Julien Ouy, Benoit Caillaud. From multi-clocked synchronous specifications to latency-insensitive systems. In Embedded Software Conference (EMSOFT), ACM Press, 2005. details
  3. David Berner, Hiren Patel, Deepak Mathaikutty, Sandeep Shukla. Automated Extraction of Structural Information from SystemC-based IP for Validation. In Proc. of 6th International Workshop on Microprocessor Test and Verification (MTV'05), Austin Texas, USA, November 2005. details
  4. Syed Suhaib, Deepak Mathaikutty, David Berner, Sandeep Shukla. Validating Families of Latency Insensitive Protocols. In To be published in Proceedings of the IEEE International High Level Design Validation and Test Workshop (HLDVT), Napa Valley, California, USA, November 2005. details
  5. Jean Bézivin, Christian Brunette, Régis Chevrel, Frédéric Jouault, Ivan Kurtev. Bridging the \textscGeneric \textscModeling \textscEnvironment and the \textscEclipse \textscModeling \textscFramework. In Proc. of the 4th workshop in Best Practices for Model Driven Software Development, OOPSLA, October 2005. details
  6. David Berner, Hiren Patel, Deepak Mathaikutty, Jean-Pierre Talpin, Sandeep Shukla. SystemCXML: An Extensible SystemC Front End Using XML. In Proceedings of the Forum on specification and design languages (FDL), Lausanne, Switzerland, September 2005. details
  7. Frederic Doucet, Massimiliano Menarini, Ingolf Kruger, Jean-Pierre Talpin, Rajesh Gupta. A verification approach for GALS integration of synchronous components. In Proceedings of the International Workshop on Formal Methods for Globally Asynchronous Locally Synchronous Design (FMGALS), Verona, Italy, July 2005. details
  8. Abdoulaye Gamatié, Thierry Gautier, Paul Le Guernic, Jean-Pierre Talpin. Dealing with Real-Time Issues within the Polychronous Framework. In Proceedings of the 17th Euromicro Conference on Real Time Systems (ECRTS'05), Work-in-Progress Session, Palma de Mallorca, Balearic Islands - Spain, July 2005. details
  9. Julien Ouy. A survey of desynchronization in a polychronous model of computation. In Proceedings of the International Workshop on Formal Methods for Globally Asynchronous Locally Synchronous Design (FMGALS), Verona, Italy, July 2005. details
  10. Syed Suhaib, David Berner, Deepak Mathaikutty, Jean-Pierre Talpin, Sandeep Shukla. A Functional Programming Framework for Latency Insensitive Protocol Validation. In Proceedings of the International Workshop on Formal Methods for Globally Asynchronous Locally Synchronous Design (FMGALS), Verona, Italy, July 2005. details
  11. Laurent Rioux, Thierry Saunier, Sebastien Gérard, A Radermacher, Robert De Simone, Thierry Gautier, Yves Sorel, J Forget, Jean-Luc Dekeyser, A Cuccuru, C Dumoulin, Charles André. MARTE: A New OMG Profile RFP for the Modeling and Analysis of Real-Time Embedded Systems. In DAC 2005 Workshop UML for SoC Design, UML-SoC'05, Anaheim CA, USA, June 2005. details
  12. Abdoulaye Gamatié, Thierry Gautier, Paul Le Guernic. Conception Synchrone d'Applications Avioniques par Raffinement de Modèles. In Proc. of the 13th International Conference on Real-time Systems (RTS'2005), Paris - France, April 2005. details

2004

  1. D. Berner, J.P. Talpin, P. Le Guernic, S. K Shukla. Modular design through component abstraction. In International conference on compilers, architectures and synthesis for embedded systems, 2004. details
  2. M. Mousavi, P. Le Guernic, J.P. Talpin, S. Shukla, T. Basten. Modeling and validation of asynchronous systems in synchronous frameworks. In Design Analysis and Test Europe, 2004. details
  3. J.P. Talpin, D. Berner, S. K. Shukla, A. Gamatié, P. Le Guernic, R. Gupta. A behavioral type inference system for compositional system-on-chip design. In Application of Concurrency to System Design, 2004. details
  4. Syed Suhaib, Deepak Mathaikutty, David Berner, Sandeep Shukla. Extreme Formal Modeling (XFM) for Hardware Models. In 5th International Workshop on Microprocessor Test and Verification, September 2004. details
  5. A. Gamatié, T. Gautier, P. Le Guernic. An Example of Synchronous Design of Embedded Real-Time Systems based on IMA. In Proceedings of the 10th International Conference on Real-time and Embedded Computing Systems and Applications (RTCSA'2004), Gothenburg, Sweden, August 2004. details

2003

  1. Mirabelle Nebut. Un langage d'horloge pour analyser et spécifier les réactions synchrones. In Approches Formelles pour l'Assistance au Développement de Logiciels (AFADL'03), 2003. details
  2. Jean-Pierre Talpin, Paul Le Guernic, S. K. Shukla, R. Gupta, F. Doucet. A polychronous model for high-level component-based system design. In Digital Automation and Test Europe, March 2003. details

2002

  1. A. Benveniste, P. Caspi, Le Guernic Guernic P, H. Marchand, Jean-Pierre Talpin, S. Tripakis. A Protocol for Loosely Time-Triggered Architectures. In Proc. of 2002 Conference on Embedded Software (EMSOFT'02), J. Sifakis, A. Sangiovanni-Vincentelli (eds.), LNCS, Volume 2491, October 2002. details
  2. Abdoulaye Gamatié, Thierry Gautier. Modeling of Modular Avionics Architectures Using the Synchronous Language SIGNAL. In Proceedings of the Work In Progress session, 14th Euromicro Conference on Real Time Systems, ECRTS'02, Pages 25-28, June 2002. details
  3. Mirabelle Nebut. A Clock Language to Specify and Analyze Synchronous Data-Flow Specifications. In Actes de l'école d'été Movep'02, MOdélisation et Vérification des systèmes PArallèles, Nantes, France, June 2002. details
  4. Mirabelle Nebut, Sophie Pinchinat. A Decidable Clock Language for Synchronous Specifications. In Synchronous Languages, Applications, and Programming (SLAP'02), Volume 65, Grenoble, France, April 2002. details
  5. H. Marchand, L. Rozé. Diagnostic de pannes sur des systèmes à événements discrets : une approche à base de modèles symboliques. In 13ème Congrès Francophone AFRIF-AFIA de Reconnaissance des Formes et Intelligence Artificielle, January 2002. details

2001

  1. F. Jiménez, E. Rutten. A synchronous model of IEC 61131 PLC languages in Signal. In Proceedings of the 13th Euromicro Conference on Real-Time Systems, ECRTS'01, June 13th-15th, 2001, Delft, The Netherlands, Pages 135-142, 2001. details
  2. Albert Benveniste, Patricia Bournai, Thierry Gautier, Michel Le Borgne, Paul Le Guernic, Hervé Marchand. The Signal declarative synchronous language: controller synthesis & systems/architecture design. In 40th IEEE Conference on Decision and Control, December 2001. details
  3. Hervé Marchand, O. Boivineau, S. Lafortune. Optimal control of discrete event systems under partial observation. In 40th IEEE Conference on Decision and Control, December 2001. details
  4. K. Kuchcinski, C. Wolinski. Synthesis of Conditional Behaviors Using Hierarchical Conditional Dependency Graphs and Constraint Logic Programming. In Proceedings of EUROMICRO'01, Varsovie, Pologne, September 2001. details
  5. A. Benveniste. Some synchronization issues when designing embedded systems from components. In First International Workshop on Embedded Software (EMSOFT'2001), Lecture Notes in Computer Science, vol 2211, August 2001. details

2000

  1. L. Helouet, P. Le Maigat. Decomposition of Message Sequence Charts. In Workshop on SDL and MSC, SAM'00, Pages 47-60, 2000. details ps
  2. L. Helouet, P. Le Maigat. Decomposition of Message Sequence Charts. In Workshop on SDL and MSC, SAM'00, Pages 47-60, 2000. details ps
  3. F. Jiménez, E. Rutten. Hybrid simulation of IEC-61131 PLC programs using Signal and Simulink. In Proceedings of the 4th International Conference on Automation of Mixed Processes, ADPM'00, 18-19 September 2000, Dortmund, Germany, Pages 171-176, 2000. details
  4. Y. Wang. Compilation of state-machines using Behavior Expression. In Workshop PhDOOS 2000 in 14th European Conference on Object-Oriented Programming, 2000. details
  5. A. Kountouris, C. Wolinski. Efficient Scheduling of Conditional Behaviors Using Hierarchical Conditional Dependency Graphs in CODESIS System. In Proceedings of EUROMICRO'00, Pages 222-229, Maastricht, The Netherlands, September 2000. details
  6. A. Kountouris, C. Wolinski. Hierarchical Conditional Dependency Graphs as a Unifying Design Representation in the CODESIS High-Level Synthesis System. In Proceedings of ISSS'00, Pages 66-71, Madrid, Spain, September 2000. details
  7. A. Kountouris, C. Wolinski. Efficient Scheduling of Conditional Behaviors Using Hierarchical Conditional Dependency Graphs in CODESIS System. In Proceedings of EUROMICRO'00, Pages 222-229, Maastricht, The Netherlands, September 2000. details
  8. A. Kountouris, C. Wolinski. Hierarchical Conditional Dependency Graphs as a Unifying Design Representation in the CODESIS High-Level Synthesis System. In Proceedings of ISSS'00, Pages 66-71, Madrid, Spain, September 2000. details
  9. S. Tudoret, S. Nadjm-Tehrani, A. Benveniste, J. E. Strömberg. Co-simulation of Hybrid Systems: Signal-Simulink. In Proceedings of 6th international school and symposium on Formal Techniques in Real-time and Fault-tolerant Systems, Lecture Notes in Computer Science, September 2000. details
  10. M. Kerboeuf, D. Nowak, J. P. Talpin. The steam-boiler problem in SIGNAL-COQ. In International Conference on Theorem Proving in Higher-Order Logics, Lecture Notes in Computer Science, August 2000. details ps
  11. M. Kerboeuf, D. Nowak, J. P. Talpin. The steam-boiler problem in SIGNAL-COQ. In International Conference on Theorem Proving in Higher-Order Logics, Lecture Notes in Computer Science, August 2000. details ps
  12. P. Le Maigat, L. Helouet. A (max,+) Approach for time in Message Sequence Charts. In Workshop on DES, WODES'00, Pages 83-92, Ghent, Belgium, August 2000. details ps
  13. P. Le Maigat, L. Helouet. A $(\max,+)$ Approach for time in Message Sequence Charts. In Proc of 5th Workshop on Discrete Event Systems, WODES 2000, Pages 83-92, Ghent, Belgium, August 2000. details ps
  14. S. Pinchinat, H. Marchand. Symbolic Abstractions of Automata. In Proc of 5th Workshop on Discrete Event Systems, WODES 2000, Pages 39-48, Ghent, Belgium, August 2000. details ps
  15. Y. Wang, J. P. Talpin, A. Benveniste, P. Le Guernic. Compilation and distribution of state machines using Spots. In 16th IFIP World Computer Congress (WCC'2000), August 2000. details ps
  16. H. Marchand, S. Pinchinat. Supervisory Control Problem using Symbolic Bisimulation Techniques. In 2000 American Control Conference, Pages 4067-4071, Chicago, Illinois, USA, June 2000. details ps
  17. M. Nebut. Calcul d'horloges et valeurs. In MOVEP'2k MOdelling and VErification of Parallel processes, F. Cassez, C. Jard, B. Rozoy, M. Ryan (eds.), Pages 199-202, Nantes, June 2000. details
  18. M. Nebut. Calcul d'horloges et valeurs. In MOVEP'2k MOdelling and VErification of Parallel processes, F. Cassez, C. Jard, B. Rozoy, M. Ryan (eds.), Pages 199-202, Nantes, June 2000. details
  19. Y. Wang, J. P. Talpin, A. Benveniste, P. Le Guernic. A semantics of UML state-machines using synchronous pre-order transition systems. In International Symposium on Object-Oriented Real-Time Distributed Computing (ISORC'2000), March 2000. details ps

1999

  1. F. Jiménez, E. Rutten. Modélisation synchrone de standards de programmation de systèmes de contrôle. In Actes de la Journée d'études sur les Nouvelles Percées dans les Langages pour l'Automatique, Amiens, November 1999. details ps
  2. H. Marchand, M. Samaan. On the Incremental Design of a Power Transformer Station Controller using Controller Synthesis Methodology. In World Congress on Formal Methods (FM'99), Volume 1709 of LNCS, Pages 1605-1624, Toulouse, France, October 1999. details ps
  3. I. Smarandache, T. Gautier, P. Le Guernic. Validation of Mixed Signal-Alpha Real-Time Systems through Affine Calculus on Clock Synchronisation Constraints. In World Congress on Formal Methods (FM'99), Volume 1709 of LNCS, Pages 1364-1383, Toulouse, France, October 1999. details ps
  4. A. Benveniste, B. Caillaud, P. Le Guernic. From synchrony to asynchrony. In CONCUR'99, Concurrency Theory, 10th International Conferenc, Volume 1664 of LNCS, J.C.M. Baeten, S. Mauw (eds.), Pages 162-177, August 1999. details
  5. F. Besson, T. Jensen, J.-P. Talpin. Timed polyhedra analysis for synchronous languages. In Proceedings of the 10th International Conference on Concurrency Theory (CONCUR'99), LNCS volume 1664, August 1999. details ps
  6. A. Kountouris, C. Wolinski. High-level Pre-synthesis Optimization Steps using Hierarchical Conditional Dependency Graphs. In Proceedings of the EUROMICRO'99, Milan, Italie, August 1999. details
  7. J.C. Le Lann, C. Wolinski. Load Balancing and Functional Unit Assignment in High-Level Synthesis. In Proceedings of the SCI'99/ISAS'99, Orlando, Floride, August 1999. details
  8. D. Nowak, J.P. Talpin, P. Le Guernic. Synchronous Structures. In Proceedings of the 10th International Conference on Concurrency Theory (CONCUR'99), Volume 1664 of LNCS, August 1999. details ps
  9. L. Besnard, P. Bournai, T. Gautier, N. Halbwachs, S. Nadjm-Tehrani, A. Ressouche. Design of a multi-formalism application and distribution in a data-flow context: an example. In Proceedings of The 12th International Symposium on Languages for Intensional Programming, ISLIP' 99, NCSR Demokritos, Athens, Greece, June 1999. details ps
  10. F. Jiménez, E. Rutten. A synchronous model of the PLC programming language ST. In Proceedings of the Work In Progress session, 11th Euromicro Conference on Real Time Systems, ERTS'99, Pages 21-24, York, England, June 1999. details ps
  11. J.R. Beauvais, R. Houdebine, Y.M. Tang, P. Le Guernic, E. Rutten, T. Gautier. Une modélisation de StateCharts et ActivityCharts en Signal. In Actes du 2ème Congrès sur la Modélisation des Systèmes Réactifs, MSR'99, Cachan, March 1999. details ps
  12. T. Gautier, P. Le Guernic. Code generation in the SACRES project. In Towards System Safety, Proceedings of the Safety-critical Systems Symposium, SSS'99, Huntingdon, UK, February 1999. details ps
  13. A. Kountouris, C. Wolinski. Hierarchical Conditional Dependency Graphs for Mutual Exclusiveness Identification. In 12th International Conference on VLSI Design, Goa, India, January 1999. details
  14. A. Kountouris, C. Wolinski. Combining Speculative Execution and Conditional Resource Sharing to Efficiently Schedule Conditional Behaviors. In ASP-DAC'99, Hong Kong, January 1999. details

1998

  1. A. Kountouris, C. Wolinski. False Path Analysis based on a Hierarchical Control Representation. In Proceedings of ISSS'98, Hsinchu, Taiwan, R.O.C, December 1998. details ps
  2. S. Pinchinat, E. Rutten, R.K. Shyamasundar. Taxonomy and expressiveness of preemption : a syntactic approach. In Proceedings of the Asian Computing Science Conference, ASIAN'98, LNCS, Manila, The Philippines, December 1998. details ps
  3. J.P. Talpin, D. Nowak. A Synchronous Semantics of Higher-Order Processes for Modeling Reconfigurable Reactive Systems. In International Conference on Foundations of Software Technology and Theoretical Computer Science (FST & TCS'98), December 1998. details ps
  4. H. Marchand, O. Boivineau, S. Lafortune. On the Synthesis of Optimal Schedulers in Discrete Event Control Problems with Multiple Goals. In 1998 IEEE International Conf. On Systems, Man, And Cybernetics, Pages 734-739, San Diego, California, USA, October 1998. details ps
  5. H. Marchand, P. Bournai, M. Le Borgne, P. Le Guernic. A Design Environment for Discrete-Event Controllers based on the SIGNAL Language. In 1998 IEEE International Conf. On Systems, Man, And Cybernetics, Pages 770-775, San Diego, California, USA, October 1998. details ps
  6. A. Benveniste, C. Jard, S. Gaubert. Algebraic techniques for timed systems. In CONCUR'98 Concurrency Theory, 9th International Conference, D. Sangiorgi, R. de Simone (eds.), Lecture Notes in Computer Science 1466, Nice, September 1998. details ps
  7. A. Benveniste, M. Siegel, L. Holenderski, K. Winkelmann, E. Sefton, E. Rutten, P. Le Guernic, T. Gautier. Safety Critical Embedded Systems Design: the SACRES approach. In Formal Techniques in Real-Time and Fault Tolerant systems, FTRTFT'98 school, Lyngby, Denmark, September 1998. details ps
  8. J.C. Le Lann. Operand Isolation Using Signal Clock Calculus. In Proceedings of the 1st UK Low-Power Workshop, Sheffield, UK, September 1998. details
  9. H. Marchand, M. Le Borgne. Partial Order Control of Discrete Event Systems modeled as Polynomial Dynamical Systems. In 1998 IEEE International Conference On Control Applications, Trieste, Italie, September 1998. details ps
  10. D. Nowak, J.R. Beauvais, J.P. Talpin. Co-Inductive Axiomatization of a Synchronous Language. In Theorem Proving in Higher Order Logics (TPHOLs'98), Pages 387-399, September 1998. details ps
  11. A. Benveniste, S. Gaubert, C. Jard. Monotone rationale series and max-plus algebraic models of real-time systems. In Proceedings of the Fourth Workshop on Discrete Event Systems, Cagliari, Italy, August 1998. details ps
  12. O. Kouchnarenko, S. Pinchinat. Labeling Automata with Polynomials. In Proceedings of the International Workshop on Reasoning about Actions (joint to ESSLLI'98), Saarbrueken, Germany, August 1998. details ps
  13. O. Kouchnarenko, S. Pinchinat. Intensional Approaches for Symbolic Methods. In the 23rd International Symposium on Mathematical Foundations of Computer Science, MFCS'98, International Workshop on Concurrency, Brno, Czech Republic, August 1998. details
  14. A. Kountouris, C. Wolinski. Hierarchical Conditional Dependency Graphs for Conditional Resource Sharing. In Proceedings of Euromicro'98, Vasteras, Sweden, August 1998. details ps
  15. H. Marchand, M. Le Borgne. On the Optimal Control of Polynomial Dynamical Systems over Z/pZ. In 4th IEE International Workshop on Discrete Event Systems, Pages 385-390, Cagliari, Italie, August 1998. details ps
  16. A. Benveniste. Synchronous languages and reactive system design. In Proceedings of the 9th IFAC-INCOM'98, Nancy, June 1998. details
  17. P. Le Guernic, S. Machard, E. Rutten. Répartition de programmes Signal. In Actes des Rencontres Francophones du Parallélisme des Architectures et des Systèmes, RenPar'10, Strasbourg, June 1998. details ps
  18. A. Benveniste, T. Gautier, P. Le Guernic, E. Rutten. Distributed code generation of dataflow synchronous programs: the SACRES approach. In Proceedings of The Eleventh International Symposium on Languages for Intensional Programming, ISLIP'98, Sun Microsystems, Palo Alto, California (USA), May 1998. details ps
  19. J.P. Talpin, A. Benveniste, B. Caillaud, C. Jard, Z. Bouziane, H. Canon. BDL, a language of distributed reactive objects. In International Symposium on Object-Oriented Real-Time Distributed Computing (ISORC'98), April 1998. details ps
  20. J.R. Beauvais, T. Gautier, P. Le Guernic, R. Houdebine, E. Rutten. A translation of Statecharts into Signal. In Proceedings of the International Conference on Application of Concurrency to System Design (CSD'98), Pages 52-62, Aizu-Wakamatsu, Japan, March 1998. details ps
  21. J.C. Le Lann. Génération automatique de code VHDL à partir de Signal. In Journées AAA98, CEA, Saclay, January 1998. details

1997

  1. A. Benveniste, P. Le Guernic, P. Aubry. Compositionality in dataflow synchronous languages: specification and code generation. In Proceedings of the 1997 Workshop on Compositionality, W.P. de Roever and A. Pnueli Eds, Malente, Germany, 1997. details
  2. T. Gautier, P. Le Guernic, P. Quinton, S. Rajopadhye, T. Risset, I. Smarandache. Le projet Cairn : vers la conception d'architectures à partir de Signal et Alpha. In Actes des Séminaires Action Scientifique - Codesign, 1997. details
  3. S. Pinchinat, J.V. Echague. SOS specifications and Compositional ST-semantics. In XXIII Conferencia Latinoamericana de Informatica, Valparaiso, Chili, November 1997. details ps
  4. Ph. Baufreton, X. Méhaut, E. Rutten. Embedded Systems in Avionics and the Sacres Approach. In Proceedings of The 16th International Conference on Computer Safety, Reliability and Security, SAFECOMP'97, York, United Kingdom, September 1997. details ps
  5. Ph. Baufreton, H. Granier, X. Méhaut, E. Rutten. The Sacres Approach to Emdedded Systems Applied to Aircraft Engine Controllers. In Proceedings of the 22st IFAC/IFIP Workshop on Real Time Programming, WRTP'97, Lyon, France, Présentation invitée, September 1997. details ps
  6. O. Kouchnarenko, P. Schnoebelen. A Formal Framework for the Analysis of Recursive-Parallel Programs. In Parallel Computing Technologies, 4th International Conference, PaCT-97 Yaroslavl, Russia, Pages 45-59, September 1997. details
  7. A. Kountouris, C. Wolinski. A Method for the Generation of HDL Code at the RTL level form a High-Level Formal Specification Language. In Proceedings of MWSCAS'97, Sacramento, August 1997. details ps
  8. D. Nowak, J.P. Talpin, T. Gautier, P. Le Guernic. An ML-like module system for the synchronous language Signal. In European Conference on Parallel Processing (Euro-Par'97), Pages 1244-1253, August 1997. details ps
  9. I. Smarandache, P. Le Guernic. Affine Transformations in Signal and Their Applications in the Specification and Validation of Real-Time Systems. In Transformation-Based Reactive Systems Development, Proceedings of the 4th International AMAST Workshop on Real-Time Systems and Concurrent and Distributed Software, May 1997. details ps
  10. J.P. Talpin. Reactive types. In International Joint Conference on the Theory and Practice of Software Development (TAPSOFT'97), April 1997. details ps
  11. Ph. Baufreton, X. Méhaut, E. Rutten. L'approche Sacres pour les systèmes embarqués à sécurité critique. In Actes du Salon Real-Time Systems RTS'97, Paris, Pages 101-118, January 1997. details ps

1996

  1. A. Benveniste. Compositional and uniform modelling of hybrid systems. In Proc. of IEEE-CDC, Kobe, 1996. details
  2. A. Kountouris. Safe and Efficient Elimination of Infeasible Execution Paths in WCET Estimation. In Proceedings of the International Workshop in R/T Computing Systems and Applications (RTCSA'96), Seoul, South Korea, November 1996. details ps
  3. P. Le Guernic, E. Rutten. Experiments with the synchronous methodology illustrating its support of predictability. In Proceedings of the 21st IFAC/IFIP Workshop on Real Time Programming, WRTP'96, Pages 81-86, Canela/Gramado, RS, Brazil, November 1996. details ps
  4. P. Aubry, P. Le Guernic. On the desynchronization of synchronous applications. In Proceedings of the 11th International Conference on Systems Engineering, ICSE'96, Las Vegas, Nevada (USA), July 1996. details ps
  5. M. Le Borgne, H. Marchand, E. Rutten, M. Samaan. Formal Verification of SIGNAL programs: Application to a Power Transformer Station Controller. In Proceedings of the Fifth International Conference on Algebraic Methodology and Software Technology AMAST'96, Pages 271-285, Munich, Germany, July 1996. details ps
  6. H. Marchand, E. Marchand, E. Rutten. Spécification et vérification de systèmes réactifs : expérimentation de la méthodologie synchrone SIGNAL. In Actes du Congrès AFCET sur la Modélisation des Systèmes Réactifs, MSR'96, Brest, March 1996. details ps
  7. Proj. ASAR, P. Aubry, M. Belhadj, TH. Gautier, P. Le Guernic, P. Quinton, C. Dezan, M. Israël, J. Benzakki, T. Bouguerba, F. Rousseau, M. Auguin, C. Carrière, G. Cogniat, G. Durrieu, M. Lemaître, E. Martin, O. Sentieys, J.L. Philippe, L. Rideau. Vers un Atelier d'accueil générique pour la Synthèse ARchitecturale bâti autour de Centaur : ASAR. In Quatrième Symposium Architectures Nouvelles de Machines, Pages 51-62, Irisa, Rennes, February 1996. details
  8. A. Kountouris, P. Le Guernic. Profiling of SIGNAL Programs and its application in the timing evaluation of design implementations. In Proceedings of the IEE Colloq. on HW-SW Cosynthesis for Reconfigurable Systems, Pages 6-6, HP Labs, Bristol, UK, February 1996. details ps
  9. P. Aubry, P. Le Guernic, S. Machard. Synchronous distribution of SIGNAL programs. In Proc. of the 29th Hawaii International Conference on System Sciences, Volume 1, Pages 656-665, January 1996. details ps

1995

  1. T. Amagbegnon, L. Besnard, P. Le Guernic. Implementation of the Data-flow Synchronous Language Signal. In Programming Languages Design and Implementation, Pages 163-173, 1995. details ps
  2. S. Pinchinat, E. Rutten, R.K. Shyamasundar. Preemption primitives in reactive languages (a preliminary report). In Proceedings of the Asian Computing Science Conference, ACSC '95, Pathumthani, Thailand, December 1995. details ps
  3. J.V. Echagüe, Z. Habbas, S. Pinchinat. Structural Operational Semantics for True Concurrency. In Proc. of the 15th International Conference of the Chilean Computer Science Society, SCCC'95, Arica, Chili, November 1995. details
  4. G. Paller, C. Wolinski. SPRINGPLAY A New Class of Compile-Time Scheduling Algorithm for Heterogeneous Target Architectures. In Proceedings of the 20th IFIP/IFAC Workshop on Real Time Programming,WRTP '95, Ft. Lauderdale, Florida, November 1995. details
  5. E. Rutten, P. Le Guernic. Sequencing and preempting data flow tasks. In Proceedings of the 20th IFIP/IFAC Workshop on Real Time Programming,WRTP '95, Ft. Lauderdale, Florida, November 1995. details
  6. P. Aubry, P. Le Guernic, S. Machard. Distribution synchrone de programmes Signal. In Actes des 2ème Journées des Jeunes Chercheurs en Systèmes répartis, October 1995. details ps
  7. H. Marchand, E. Rutten, M. Samaan. Synchronous design of a transformer station controller in Signal. In Proceedings of the 4th IEEE Conference on Control Applications, CCA '95, Albany, New York, Pages 754-759, September 1995. details ps
  8. E. Marchand, F. Chaumette, E. Rutten. Real time active visual reconstruction using the synchronous paradigm. In Proceedings of the IEEE/RSJ International Conference on Intelligent Robots and Systems, IROS '95, Pittsburgh, Pennsylvania, August 1995. details ps
  9. E. Rutten, F. Martinez. Signalgti: implementing task preemption and time intervals in the synchronous data flow language Signal. In Proceedings of the 7th Euromicro Workshop on Real-Time Systems, Odense, Denmark, June 1995. details ps
  10. EP-ATR Project. Signal: a formal design environment for real time systems. In Proceedings of the 6th International Joint Conference on Theory and Practice of Software Development, TAPSOFT '95, AA arhus, Denmark, Lecture Notes in Computer Science 915, May 1995. details
  11. P. Aubry, T. Gautier. GC: the Data-Flow Graph Format of Synchronous Programming. In Proceedings ACM SIGPLAN Workshop on Intermediate Representations (IR'95), ACM Sigplan Notices, Volume 30, Pages 83-93, March 1995. details ps
  12. D. Chauveau, A. Benveniste, B.C. Levy, P. Le Guernic. Simulation et estimation de systèmes stochastiques. In Cinquième atelier d'évaluation de performances, February 1995. details

1994

  1. M. Belhadj. VHDL & SIGNAL: A Cooperative Approach. In International Conference on Simulation and Hardware Description Languages, Western Simulation Multi-Conference, Pages 76-81, Tempe, Arizona (USA), 1994. details
  2. M. Belhadj. Using VHDL for Link to Synthesis Tools. In North Atlantic Test Workshop NATW'94, Nimes, 1994. details ps
  3. A. Benveniste, T. Gautier, P. Le Guernic, G. Berry, F. Mignard, P. Caspi, N. Halbwachs, P. Couronné, F. Dupont, C. Le Maire, J.P. Paris, Y. Sorel. Synchronous technology for real-time systems. In RTS'94, Pages 105-122, 1994. details ps
  4. C. Wolinski, M. Belhadj. High Level Synthesis of Globally Asynchronous Locally Synchronous Circuits. In North Atlantic Test Workshop NATW'94, Nimes, 1994. details ps
  5. Proj. Asar, P. Aubry, M. Auguin, M. Belhadj, J. Benzakki, T. Bouguerba, C. Carrière, G. Durrieu, T. Gautier, M. Israël, P. Le Guernic, M. Lemaitre, E. Martin, P. Quinton, L. Rideau, F. Rousseau, O. Sentieys. Framework and Multi-Formalism: the ASAR Project. In Proceedings of the 4th International IFIP 10.5 Working Conference on Electronic Design Automation Frameworks, Gramado (Brésil), November 1994. details
  6. Proj. Asar, P. Aubry, M. Auguin, M. Belhadj, J. Benzakki, T. Bouguerba, C. Carrière, G. Durrieu, T. Gautier, M. Israël, P. Le Guernic, M. Lemaitre, E. Martin, P. Quinton, L. Rideau, F. Rousseau, O. Sentieys. Towards a Multi-Formalism Framework for Architectural Synthesis: the ASAR Project. In Proceedings of the Third International Workshop on Hardware/Software Codesign, Pages 25-32, Grenoble, September 1994. details ps
  7. A. Benveniste, B.C. Levy, E. Fabre, P. Le Guernic. A calculus of stochastic systems for the specification, simulation, and hidden state estimation of hybrid stochastic/nonstochastic systems. In 3rd International School and Symposium on Formal Techniques in Real-Time and Fault-Tolerant Systems, Lecture Notes in Computer Science 863, Pages 149-169, September 1994. details
  8. O. Maffeis, P. Le Guernic. Distributed Implementation of Signal: Scheduling & Graph Clustering. In 3rd International School and Symposium on Formal Techniques in Real-Time and Fault-Tolerant Systems, Lecture Notes in Computer Science 863, Pages 547-566, September 1994. details ps
  9. O. Maffeis, P. Le Guernic. From Signal to fine-grain parallel implementations. In Int. Conference on Parallel Architectures and Compilation Techniques, Pages 237-246, August 1994. details
  10. E. Rutten, P. Le Guernic. Sequencing data flow tasks in SIGNAL. In Proceedings of the ACM SIGPLAN Workshop on Language, Compiler and Tool Support for Real-Time Systems, Orlando, Florida (USA), June 1994. details ps
  11. E. Rutten, E. Marchand, F. Chaumette. The sequencing of data flow tasks in Signal: application to active vision in robotics. In Proceedings of the 6th Euromicro Workshop on Real Time Systems, Pages 80-84, University of Maelardalen, Vasteraa s (Sweden), June 1994. details ps
  12. T. Gautier, P. Le Guernic. L'environnement de programmation SIGNAL. In Proceedings of RENNES Sister Cities Computer Science Research Centers Workshop, Pages 168-175, April 1994. details ps

1993

  1. A. Benveniste, P. Caspi, P. Le Guernic, N. Halbwachs. Data-flow Synchronous Languages. In Proc of the 1993 REX symposium: Ten decades of concurrency, a perspective, 1993. details
  2. A. Benveniste, M. Le Borgne, P. Le Guernic. Hybrid Systems : the Signal Approach. In Hybrid Systems, 1993. details
  3. B. Dutertre, M. Le Borgne, A. Benveniste, P. Le Guernic. Discrete Event Systems and Synchronous Languages: an example. In Proc of the IFAC 1993 World Congress, 1993. details
  4. O. Maffeis, P. Le Guernic. Combining Dependability with Architectural Adaptability by means of the Signal Language. In 3rd Int. Workshop on Static Analysis, Volume 724 of LNCS, Pages 99-110, 1993. details
  5. C. Wolinski, T. Cholet, D. Derrien, J.P. Guillou, P. Leali, A. Riboult. Architecture for Signal programs execution. In Nordic Transputer Conference, NTUG'93, Pages 99-110, Copenhague, Danemark, 1993. details
  6. M. Belhadj, A. Kerihuel, R. McConnell. Une comparaison des approches pour la conception des circuits synchrones et asynchrones. In Journées des jeunes chercheurs en architecture de machines, December 1993. details
  7. M. Belhadj, R. McConnell, P. Le Guernic. A Framework for Macro- and Micro-Time to Model VHDL Attributes. In Proceedings of the European Design and Automation Conference with EURO-VHDL '93, Hamburg, FRG, R. Camposano (ed.), Pages 520-525, September 1993. details
  8. M. Le Borgne. Dynamical Systems over Galois Fields: Application to DES and to the SIGNAL Language. In Lecture Notes of the Belgian-French-Netherlands Summer School on Discrete Event Systems, Spa, Belgium, June 1993. details ps
  9. M. Le Borgne, B. Dutertre, A. Benveniste, P. Le Guernic. Dynamical Systems over Galois Fields. In Proc. of the Second European Control Conference (ECC93), June 1993. details

1992

  1. M. Le Borgne, B. Dutertre, A. Benveniste, P. Le Guernic. Dynamical systems over Galois fields and DEDS Control Problems. In Proc. of the 30th IEEE conference on Decision and Control, Pages 1505-1510, 1992. details
  2. P. Le Guernic. The Signal Environment. In Algorithms and Parallel VLSI Architectures II, Pages 347-358, 1992. details
  3. O. Maffeis, P. Le Guernic. Graphes dynamiques : Ordonnancement statique maximal qualitatif. In Outils d'aide à la conception et à la programmation d'architectures dédiées au traitemnt du signal et de l'image, actes de conférences Adéquation Algortihmes Architectures, Pages 97-111, 1992. details
  4. . From Timed to Hybrid Systems. In Real-Time: Theory in Practice, J.W. de Bakker, C. Huizing, W.P. de Roever, G. Rozenberg (eds.), Pages 47-484, 1992. details
  5. A. Benveniste. Constructive Probability and the Signalea language : building and handling random process via programming. In Workshop on theory of Hybrid Systems, October 1992. details
  6. B. Dutertre, M. Le Borgne, P. Le Guernic. The Cat and Mouse in the synchronous paradigm. In Joint Worshop on Discrete Event Systems (WODES'92), Pages 117-120, August 1992. details
  7. A. Benveniste, M. Le Borgne, P. Le Guernic. SIGNAL as a model for real-time and hybrid systems. In Proceedings of European Symposium on Programming (ESOP '92), B. Krieg-Brueckner (ed.), Pages 20-38, February 1992. details

1991

  1. B. Delyon, O. Maler. On Fault-Tolerant Symbolic Computations. In Formal Techniques in Real-Time and Fault-Tolerant Systems, 1991. details
  2. P. Le Guernic. Specification and verification of parallel systems. In Proceedings of the French-Israel Workshop on formal verification for hardware and software, 1991. details
  3. P. Le Guernic, T. Gautier. Programming real time applications with SIGNAL. In Proceedings of the first European Control Conference, C. Commault (ed.), Pages 1666-1671, 1991. details
  4. . On the Learnability of Infinitary Regular Sets. In 4th Annual Workshop on Computational Learning Theory, L.G. Valiant, M.K. Warmuth (eds.), Pages 128-136, 1991. details
  5. . Simulation Experiments with an Artificial Worm. In Proc. 2nd Eurographics Workshop on Animation and Simulation, Pages 215-221, 1991. details
  6. T. Gautier, P. Le Guernic. L'environnement de programmation SIGNAL. In Proceedings of RENNES Sister Cities Computer Science Research Centers Workshop, Pages 168-175, April 1991. details
  7. M. Le Borgne, A. Benveniste, P. Le Guernic. Polynomial dynamical systems over finite fields. In Algebraic Computing in control, Volume 165, Pages 212-222, March 1991. details

1990

  1. . Tight Bounds on the Complexity of Cascaded Decomposition of Automata. In Proc. 31st Annual Symposium on Foundations of Computer Science, Pages 672-682, 1990. details

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