Publications of Mohammed Belhadj

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International Conferences

1. Proj. ASAR, P. Aubry, M. Belhadj, TH. Gautier, P. Le Guernic, P. Quinton, C. Dezan, M. Israël, J. Benzakki, T. Bouguerba, F. Rousseau, M. Auguin, C. Carrière, G. Cogniat, G. Durrieu, M. Lemaître, E. Martin, O. Sentieys, J.L. Philippe, L. Rideau. Vers un Atelier d'accueil générique pour la Synthèse ARchitecturale bâti autour de Centaur : ASAR. In Quatrième Symposium Architectures Nouvelles de Machines, Pages 51-62, Irisa, Rennes, February 1996.
2. M. Belhadj. VHDL & SIGNAL: A Cooperative Approach. In International Conference on Simulation and Hardware Description Languages, Western Simulation Multi-Conference, Pages 76-81, Tempe, Arizona (USA), 1994.
3. M. Belhadj. Using VHDL for Link to Synthesis Tools. In North Atlantic Test Workshop NATW'94, Nimes, 1994.
4. C. Wolinski, M. Belhadj. High Level Synthesis of Globally Asynchronous Locally Synchronous Circuits. In North Atlantic Test Workshop NATW'94, Nimes, 1994.
5. Proj. Asar, P. Aubry, M. Auguin, M. Belhadj, J. Benzakki, T. Bouguerba, C. Carrière, G. Durrieu, T. Gautier, M. Israël, P. Le Guernic, M. Lemaitre, E. Martin, P. Quinton, L. Rideau, F. Rousseau, O. Sentieys. Framework and Multi-Formalism: the ASAR Project. In Proceedings of the 4th International IFIP 10.5 Working Conference on Electronic Design Automation Frameworks, Gramado (Brésil), November 1994.
6. Proj. Asar, P. Aubry, M. Auguin, M. Belhadj, J. Benzakki, T. Bouguerba, C. Carrière, G. Durrieu, T. Gautier, M. Israël, P. Le Guernic, M. Lemaitre, E. Martin, P. Quinton, L. Rideau, F. Rousseau, O. Sentieys. Towards a Multi-Formalism Framework for Architectural Synthesis: the ASAR Project. In Proceedings of the Third International Workshop on Hardware/Software Codesign, Pages 25-32, Grenoble, September 1994.
7. M. Belhadj, A. Kerihuel, R. McConnell. Une comparaison des approches pour la conception des circuits synchrones et asynchrones. In Journées des jeunes chercheurs en architecture de machines, December 1993.
8. M. Belhadj, R. McConnell, P. Le Guernic. A Framework for Macro- and Micro-Time to Model VHDL Attributes. In Proceedings of the European Design and Automation Conference with EURO-VHDL '93, Hamburg, FRG, R. Camposano (ed.), Pages 520-525, September 1993.

Research Reports

1. C. Wolinski, M. Belhadj. Vers la synthèse automatique de programmes SIGNAL. Research Report Irisa, No 746, July 1993.

PhD Thesis

1. M. Belhadj. Conception d'architectures en utilisant Signal et VHDL. PhD Thesis Université de Rennes I, IFSIC, December 1994.

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