All the publications

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Books

1. Sandeep K. Shukla, Jean-Pierre Talpin (eds.). Synthesis of Embedded Software. Springer, 2010.
2. C. Heitmeyere, J.P. Talpin (eds.). Proceedings of the 2nd. ACM-IEEE conference on methods and models for codesign. IEEE Press, 2004. download
3. R. Gupta, P. Le Guernic, S. Shukla, J.P. Talpin (eds.). Formal Methods and Models for System Design. Kluwer Academic Publishers, 2004.
4. C. Samson, M. Le Borgne, B. Espiau. Robot Control. The Task Function Approach. 22, Oxford engineering science series, 22, Clarendon Press, Oxford, 1991.

Academic Journals

1. Dumitru Potop-Butucaru, Yves Sorel, Robert De Simone, Loic Besnard, Jean-Pierre Talpin. From concurrent multi-clock programs to concurrent multi-threaded implementations. Fundamenta Informaticae, 2011.
2. Yue Ma, Thierry Gautier, Jean-Pierre Talpin, Paul Le Guernic, Huafeng Yu. Modélisation compositionnelle d'architectures GALS dans un modèle de calcul polychrone. Journal Européen des Systèmes Automatisés, November 2011.
3. Abdoulaye Gamatie, Thierry Gautier. The Signal Synchronous Multiclock Approach to the Design of Distributed Embedded Systems. IEEE Transactions on Parallel and Distributed Systems, 21(5), 2010.
4. Imran Quadri, Huafeng Yu, Abdoulaye Gamatie Samy, Meftali and Jean-Luc Dekeyser, Eric Rutten. Targeting Reconfigurable FPGA based SoCs using the MARTE UML profile: from high abstraction levels to code generation. International Journal of Embedded Systems, 2010.
5. Huafeng Yu, Abdoulaye Gamatie, Eric Rutten, Jean-Luc Dekeyser. Adaptivity in High-Performance Embedded Systems: a Reactive Control Model for Reliable and Flexible Design. Knowledge Engineering Review, Accepted for publication, 2010.
6. Jean-Pierre Talpin, Julien Ouy, Thierry Gautier, Loic Besnard, Paul Le Guernic. Compositional design of isochronous systems. Science of Computer Programming, 2010.
7. Imran Rafiq Quadri, Abdoulaye Gamatie, Samy Meftali, Jean-Luc Dekeyser, Huafeng Yu, …ric Rutten. Targeting Reconfigurable FPGA based SoCs using the MARTE UML profile: from high abstraction levels to code generation. International Journal of Embedded Systems, September 2010.
8. D. Potop-Butucaru, R. De Simone, J.-P. Talpin. The synchronous hypothesis and polychronous languages. 2009.
9. B. Jose, B. Xue, S. Shukla, J.-P. Talpin. 2009.
10. Abdoulaye Gamatié, Thierry Gautier, Paul Le Guernic, Jean-Pierre Talpin. Polychronous Design of Embedded Real-Time Applications. ACM Transactions on Software Engineering and Methodology (TOSEM), 2007.
11. Abdoulaye Gamatié, Thierry Gautier, Paul Le Guernic. Synchronous Design of Avionic Applications based on Model Refinements. Journal of Embedded Computing, 2007.
12. Lionel Morel. Array Iterators in Lustre: from a language extension to its exploitation in validation. EURASIP Journal of Embedded Computing, 2007.
13. Jean-Pierre Talpin, Paul Le Guernic. An algebraic theory for behavioral modeling and protocol synthesis in system design. Formal Methods in System Design, 2006.
14. Syed Suhaib, Deepak Mathaikutty, David Berner, Sandeep Shukla. Validating Families of Latency Insensitive Protocols. IEEE Transactions on Computers, 55(11):1391-1401, 2006.
15. Hiren D. Patel, Deepak Mathaikutty, David Berner, Sandeep Shukla. ARH: service-oriented architecture for validating system-level designs. IEEE Transactions on Computer-Aided Design, 25(8):1458-1474, 2006.
16. Jean-Pierre Talpin, Paul Le Guernic. An algebraic theory for behavioral modeling and protocol synthesis in system design. Formal Methods in System Design, Special Issue on formal methods for GALS design, 2005.
17. Jean-Pierre Talpin, Paul Le Guernic, Sandeep Shukla, Rajesh Gupta. Compositional behavioral modeling of embedded systems and conformance checking. International Journal on Parallel processing, special issue on testing of embedded systems, 2005.
18. Dimitru Potop-Butucaru, Robert De Simone, Jean-Pierre Talpin. The synchronous hypothesis and synchronous languages. Embedded Systems Handbook, 2005.
19. Syed Suhaib, Deepak Mathaikutty, David Berner, Sandeep Shukla. XFM :An Incremental Methodology for Developing Formal Models. ACM Transactions on Design Automation of Electronic Systems (TODAES) Special Issue on Validation of Large Systems, October 2005.
20. J.P. Talpin, P. Le Guernic, S. K. Shukla, R. Gupta, F. Doucet. Formal refinement checking in a system-level design methodology. Fundamenta Informaticae, 2004.
21. M. Kerboeuf, J.P. Talpin. Encapsulation and behavioural inheritance in a synchronous model of computation for embedded system services adaptation. Journal of Logics and Algebraic Programming, 2004.
22. A. Benveniste, P. Caspi, S. Edwards, N. Halbwachs, P. Le Guernic, R. de Simone. The Synchronous Languages Twelve Years Later. Proceedings of the IEEE, special issue on Embedded Systems, 2002.
23. Paul Le Guernic, Jean-Pierre Talpin, J.-C. Le Lann. Polychrony for system design. Journal of Circuits, Systems and Computers. Special Issue on Application Specific Hardware Design, 2002.
24. Apostolos Kountouris, Christophe Wolinski, Jean-Christophe Le Lann. High-Level Synthesis Using Hierarchical Conditional Dependency Graphs in the CODESIS System. EUROMICRO Journal of Systems Architecture on Modern Methods and Tools in Digital System Design, 2001.
25. Jean-René Beauvais, Eric Rutten, Thierry Gautier, Paul Le Guernic, Yan-Mei Tang. Modelling Statecharts and Activitycharts as Signal equations. ACM Transactions on Software Engineering and Methodology, 10(4), 2001.
26. Hervé Marchand, Eric Rutten, Michel Le Borgne, Mazen Samaan. Formal Verification of Programs specified with Signal: Application to a power transformer Station Controller. Science of Computer Programming, 41(1):85-104, August 2001.
27. A. Kountouris, C. Wolinski, J.C. Le Lann. High-Level Synthesis Using Hierarchical Conditional Dependency Graphs in the CODESIS System. EUROMICRO Journal of Systems Architecture on Modern Methods and Tools in Digital System Design, 2000.
28. H Marchand, O. Boivineau, S. Lafortune. On the Synthesis of Optimal Schedulers in Discrete Event Control Problems with Multiple Goals. SIAM Journal on Control and Optimization, 39(2):512-532, 2000.
29. H. Marchand, E. Rutten, M. Le Borgne, M. Samaan. Formal Verification of SIGNAL programs: Application to a Power Transformer Station Controller. Science of Computer Programming, 2000.
30. A. Kountouris, C. Wolinski, J.C. Le Lann. High-Level Synthesis Using Hierarchical Conditional Dependency Graphs in the CODESIS System. EUROMICRO Journal of Systems Architecture on Modern Methods and Tools in Digital System Design, 2000.
31. H. Marchand, P. Bournai, M. Le Borgne, P. Le Guernic. Synthesis of Discrete-Event Controllers based on the Signal Environment. Discrete Event Dynamic System: Theory and Applications, 10(4):325-346, October 2000.
32. H. Marchand, M. Samaan. Incremental Design of a Power Transformer Station Controller using Controller Synthesis Methodology. IEEE Transaction on Software Engineering, 26(8):729-741, August 2000.
33. F. Jiménez, E. Rutten. Modélisation synchrone de standards de programmation de systèmes de contrôle : le langage ST de la norme CEI 1131-3. Revue de l'électricité et de l'électronique (SEE), (3):60-68, March 2000.
34. F. Jiménez, E. Rutten. Modélisation synchrone de standards de programmation de systèmes de contrôle : le langage ST de la norme CEI 1131-3. Revue de l'électricité et de l'électronique (SEE), (3):60-68, March 2000.
35. A. Benveniste, B. Caillaud, P. Le Guernic. Compositionality in dataflow synchronous languages: specification & distributed code generation. Information and Computation, 1999.
36. O. Kouchnarenko, S. Pinchinat. Intensional approachs for symbolic methods. Electronic Notes in Theoretical Computer Science, 18, 1998.
37. A. Benveniste. Compositional and Uniform Modelling of Hybrid Systems. IEEE Transactions on Automatic Control, 43(4), April 1998.
38. E. Marchand, E. Rutten, H. Marchand, F. Chaumette. Specifying and verifying active vision-based robotic systems with the Signal environment. Int. Journal of Robotics Research, 17(4):418-432, April 1998.
39. O. Kouchnarenko, P. Schnoebelen. A Model for Recursive-Parallel Programs. Electronic Notes in Theoretical Computer Science, 5, 1997.
40. M. Tofte, J.P. Talpin. Region-based memory management. Information and Computation, 132(2):109-176, 1997.
41. E. Rutten, E. Marchand, F. Chaumette. An experiment with reactive data-flow tasking in active robot vision. Software - Practice & Experience, 27(5):599-621, May 1997.
42. E. Marchand, E. Rutten, F. Chaumette. From data-flow task to multi-tasking: Applying the synchronous approach to active vision in robotics. IEEE Trans. on Control Systems Technology, 5(2):200-216, March 1997.
43. A. Benveniste, B.C. Levy, E. Fabre, P. Le Guernic. A calculus of stochastic systems for the specification, simulation, and hidden state estimation of hybrid stochastic/nonstochastic systems. Theoretical Computer Science, 2(152):171-217, December 1995.
44. F. Laroussinie, S. Pinchinat, P. Schnoebelen. Translation Results for Modal Logics of Reactive Systems. Theoretical Computer Science, 40(1), March 1995.
45. A. Benveniste. Synchronous Languages Provide Safety in Reactive Systems Design. Control Engineering, pages 87-89, September 1994.
46. A. Benveniste, P. Le Guernic, Y. Sorel, M. Sorine. A Denotational Theory of Synchronous Reactive Systems. Information and Computation, 99(2):192-230, August 1992.
47. A. Benveniste, B.C. Levy, E. Fabre, P. Le Guernic. A calculus of stochastic systems for the specification, simulation, and hidden state estimation of mixed stochastic/nonstochastic systems. Theoretical Computer Science, 152(2):171-217, December 1991.
48. A. Benveniste, P. Le Guernic, C. Jacquemot. Synchronous programming with events and relations: the SIGNAL language and its semantics. Science of Computer Programming, 16(2):103-149, September 1991.
49. A. Benveniste, G. Berry. Real-time systems designs and programming. Proc. of the IEEE, 79(9):1270-1282, September 1991.
50. P. Le Guernic, T. Gautier, M. Le Borgne, C. Le Maire. Programming Real-Time Applications with Signal. Proceedings of the IEEE, 79(9):1321-1336, September 1991.
51. P. Le Guernic, B. Chéron, T. Gautier, C. Le Maire. Développer en langage Signal. Annales des Télécommunications, 46(1):13-24, January 1991.
52. A. Benveniste, P. Le Guernic. Hybrid Dynamical Systems and the Signal Programming Language. IEEE Trans. Automat. Control, 35:535-546, May 1990.

Book Chapters

1. Loic Besnard, Thierry Gautier, Paul Le Guernic, Jean-Pierre Talpin. Compilation of Polychronous Data Flow Equations. In Synthesis of Embedded Software, Sandeep K. Shukla, Jean-Pierre Talpin (eds.), Springer, 2010.
2. Yann Glouche, Thierry Gautier, Paul Le Guernic, Jean-Pierre Talpin. A Module Language for Typing Signal Programs by Contracts. In Synthesis of Embedded Software, Sandeep K. Shukla, Jean-Pierre Talpin (eds.), Springer, 2010.
3. A. Cortier, L. Besnard, J.-P. Bodeveix, J. Buisson, F. Dagnat, M. Filali, G. Garcia, J. Ouy, M. Pantel, A. Rugina, M. Strecker, J.-P. Talpin. Synoptic : a domain-specific modeling language for space on-board application software. In Synthesis of Embedded Software, Sandeep K. Shukla, Jean-Pierre Talpin (eds.), Springer, 2010.
4. J.P. Talpin, P. Le Guernic. Algebraic theory for behavioral type inference, chapter in Formal Methods and Models for System Design. In Formal Methods and Models for System Design, Kluwer Academic Publishers, 2004.
5. J.P. Talpin, D. Berner, S. Shukla, P. Le Guernic, A. Gamatié, R. Gupta. Behavioral type inference for compositional system design, chapter in Formal Methods and Models for System Design. In Formal Methods and Models for System Design, Kluwer Academic Publishers, 2004.
6. D. Berner, S. Suhaib, S. Shukla, J.P. Talpin. Capturing formal specifications into abstract models, chapter in Formal Methods and Models for System Design. In Formal Methods and Models for System Design, Kluwer Academic Publishers, 2004.
7. L. Besnard, P. Bournai, T. Gautier, N. Halbwachs, S. Nadjm-Tehrani, A. Ressouche. Design of a Multi-formalism Application and Distribution in a Data-flow Context: An Example. In Intensional Programming II, Based on the Papers at ISLIP '99, M. Gergatsoulis, P. Rondogiannis (eds.), pp. 149-167, World Scientific, 2000.
8. T. Gautier, P. Le Guernic, P. Quinton, S. Rajopadhye, T. Risset, I Smarandache. Projet CAIRN: conception d'architectures à partir de SIGNAL et ALPHA. In C.T.I. COMETE, CODESIGN Conception conjointe logiciel-matériel, pp. 147-169, Eyrolles, Collection Technique et Scientifique des Télécommunications, 1998.
9. T. Amagbegnon, P. Le Guernic, H. Marchand, E. Rutten. Signal- the specification of a generic, verified production cell controller. In Formal Development of Reactive Systems - Case Study Production Cell, C. Lewerentz, T. Lindner (eds.), Chap. 7, pp. 115-129, Lecture Notes in Computer Science, Springer Verlag, January 1995.
10. P. Le Guernic, T. Gautier. Data-Flow to von Neumann: the Signal approach. In Advanced Topics in Data-Flow Computing, J.L. Gaudiot, L. Bic (eds.), pp. 413-438, 1991.

International Conferences

1. Huafeng Yu, Y. Ma, Y. Glouche, J.-P. Talpin, L. Besnard and T. Gautier, P. Le Guernic, A. Toom, O. Laurent. System-level Co-simulation of Integrated Avionics Using Polychrony. In Proceedings of the 26th ACM Symposium On Applied Computing (SAC'11), 2011.
2. Zhibin Yang, Jean-Paul Bodeveix, Lei Pi, D. Ma, Jean-Pierre Talpin. Two formal semantics for a subset of the AADL. In UML&AADL workshop at the IEEE International Conference on Engineering of Complex Computer Systems, 2011.
3. Jens Brandt, Michael Gemunde, Klaus Schneider, Sandeep Shukla, Jean-Pierre Talpin. Integrating System Descriptions by Clocked Guarded Actions. In Forum on Design Languages, September 2011.
4. Huafeng Yu, Jean-Pierre Talpin, Lo\"\ic Besnard, Thierry Gautier, Hervé Marchand, Paul Le Guernic. Polychronous Controller Synthesis from MARTE CCSL Timing Specifications. In ACM/IEEE Ninth International Conference on Formal Methods and Models for Codesign (MEMOCODE), Cambridge, United Kingdom, July 2011. download
5. Virginia Papailiopoulou, Dumitru Potop-Butucaru, Yves Sorel, Robert De Simone, Loic Besnard, Jean-Pierre Talpin. From concurrent multi-clock programs to concurrent multi-threaded implementations. In Electronic System Level Synthesis Conference, San Diego, California, United States, June 2011. download
6. Yue Ma, Huafeng Yu, Thierry Gautier, Jean-Pierre and Besnard, Lo\"\ic Talpin, Paul Le Guernic. System Synthesis from AADL using Polychrony. In Electronic System Level Synthesis Conference, June 2011.
7. Adnan Bouakaz, Isabelle Puaut, Erven Rohou. Predictable Binary Code Cache: A First Step Towards Reconciling Predictability and Just-In-Time Compilation. In The 17th IEEE Real-Time and Embedded Technology and Applications Symposium, Chicago, United States, April 2011. download
8. Huafeng Yu, Yue Ma, Yann Glouche, Jean-Pierre Talpin, Loic Besnard, Thierry Gautier, Paul Le Guernic, Andreas Toom, Odile Laurent. System-level Co-simulation of Integrated Avionics Using Polychrony. In ACM Symposium On Applied Computing, TaiChung, Taiwan, Province Of China, March 2011. download
9. Huafeng Yu, Jean-Pierre Talpin, Lo@c Besnard, Thierry Gautier, Frederic Mallet, Charles Andre, Robert De Simone. Polychronous Analysis of Timing Constraints in UML MARTE. In IEEE International Workshop on Model-Based Engineering for Real-Time Embedded Systems Design, Espagne Parador of Carmona, 2010.
10. Jean-Pierre Talpin, Julien Ouy, Thierry Gautier, Loic Besnard, Alexandre Cortier. Modular Interpretation of Heterogeneous Modeling Diagrams into Synchronous Equations Using Static Single Assignment. In Proceedings of the 2010 10th International Conference on Application of Concurrency to System Design, ACSD '10, Pages 137-146, 2010.
11. Yue Ma, Jean-Pierre Talpin, Thierry Gautier. Interpretation of AADL Behavior Annex into Synchronous Formalism using SSA. In Proceedings of the 2010 10th IEEE International Conference on Computer and Information Technology, Pages 2361-2366, 2010.
12. Julio C. Peralta, Thierry Gautier, Loic Besnard, Paul Le Guernic. LTSs for translation validation of (multi-clocked) Signal specifications. In Proceedings of the 2010 8th IEEE/ACM International Conference on Formal Methods and Models for Codesign (MEMOCODE), Pages 199-208, 2010.
13. Kenneth Johnson, Loic Besnard, Thierry Gautier, Jean-Pierre Talpin. A Synchronous Approach to Threaded Program Verification. In Proceedings of the 2010 10th International Workshop on Automated Verification of Critical Systems, AVOCS '10, Pages 168-183, 2010.
14. E. Vecchie, J.-P. Talpin, S. Boisgerault. A higher-order extension for imperative synchronous languages. In Software and Compilers for Embedded Systems, SCOPES'10, Pages 168-183, 2010.
15. D. Potop-Butucaru, R. De Simone, Y. Sorel, J.-P Talpin. Clock-driven distributed real-time implementation of endochronous synchronous programs. In Embedded Software Conference (EMSOFT'09), 2009.
16. L. Besnard, T. Gautier, M. Moy, J.-P. Talpin, K. Johnson, F. Maraninchi. Automatic translation of C/C++ parallel code into synchronous formalism using an SSA intermediate form. In Ninth International Workshop on Automated Verification of Cirtical Systems (AVOCS'09), to appear in Electronic Communications of the EASST, 2009.
17. J.C Peralta, T. Gautier. Towards SMV model checking of Signal (multi-clocked) specifications. In Ninth International Workshop on Automated Verification of Cirtical Systems (AVOCS'09), to appear in Electronic Communications of the EASST, Pages 171-185, 2009.
18. D. Potop-Butucaru, R. De Simone, Y. Sorel, J.-P. Talpin. From Concurrent Multiclock Programs to Deterministic Asynchronous Implementations. In Application of Concurrency to System Design (ACSD'09), 2009.
19. Y. Ma, J.-P. Talpin, S. Shukla, T. Gautier. Distributed simulation of AADL specifications in a polychronous model of computation. In International Conference on Embedded Software and Systems (ICESS'09), 2009.
20. Y. Glouche, P. Le Guernic, J.-P Talpin, T. Gautier. A Boolean algebra of contracts for logical assume-guarantee reasoning. In 6th International Workshop on Formal Aspects of Component Software (FACS 2009), to appear in ENTCS (Electronic Notes in Theoretical Computer Science), November 2009.
21. Y. Glouche, J.-P. Talpin, P. Le Guernic, T. Gautier. A module language for typing by contracts. In Proceedings of the First NASA Formal Methods Symposium (NFM'09), E. Denney, D. Giannakopoulou, C. S. P\uas\uareanu (eds.), Pages 86-95, April 2009.
22. E. Vecchie, J.-P. Talpin, K. Schneider. Separate compilation and execution of imperative synchronous modules. In Design Analysis and Test in Europe (DATE'09), April 2009.
23. Abdoulaye Gamatié, Thierry Gautier, Loïc Besnard. An Interval-Based Solution for Static Analysis in the SIGNAL Language. In Fifteenth IEEE International Conference and Workshops on the Engineering of Computer-Based Systems (ECBS 2008), Proceedings, Pages 182-190, Belfast, Northern Ireland, 2008.
24. B. Jose, S. Shukla, H. Patel, J.P. Talpin. On the automatic inference of synchronization logic for multi-threaded software synthesis from polychronous specifications. In ACM-IEEE Conference on Methods and Models for Codesign, 2008.
25. Y. Ma, J.P. Talpin, T. Gautier. Virtual prototyping AADL architectures in a polychronous model of computation. In ACM-IEEE Conference on Methods and Models for Codesign, 2008.
26. Hugo Metivier, Jean-Pierre Talpin, Thierry Gautier, Paul Le Guernic. Analysis of periodic clock relations in polychronous systems. In IFIP, Distributed Embedded Systems: Design, Middleware and Ressources (DIPES'08), Volume 271, Milano, September 2008.
27. Julien Ouy, Jean-Pierre Talpin, Loïc Besnard, Paul Le Guernic. Separate compilation of polychronous specifications. In Formal Methods for Globally Asynchronous Locally Synchronous Design, 2007.
28. P. Bostrm, L. Morel, M. Walden. Stepwise development of Simulink models using the refinement calculus framework. In International Colloquium on Theoretical Aspects of Computing, 2007.
29. Lionel Morel, Louis Mandel. Executable Contracts for Incremental Prototypes of Embedded Systems. In Workshop on Formal Foundations of Embedded Software and Component-Based Software Architectures, 2007.
30. Sandeep Shukla, Sihed Suhaib, Deepak Mathaikutty, Jean-Pierre Talpin. On the polychronous approach to embedded software design. In Next generation design and verification methodologies for distributed embedded systems, 2007.
31. S Suhaib, D Mathiakutty, Sandeep Shukla, Jean-Pierre Talpin. Polychronous methodology for system design, a true concurrency approach. In High-level design, validation and test workshop, IEEE Press, November 2006.
32. Jean-Pierre Talpin, Christian Brunette, Thierry Gautier, Abdoulaye Gamatié. Polychronous mode automata. In Embedded Software Conference, ACM Press, September 2006.
33. Christian Brunette, R Delamare, Abdoulaye Gamatié, Thierry Gautier, Jean-Pierre Talpin. A modeling paradigm for integrated modular avionics design. In Software Engineering and Advanced Application, IEEE Press, September 2006.
34. Loïc Besnard, Hervé Marchand, Eric Rutten. The Sigali Tool Box Environment. In WODES'06, 8th International Workshop on Discrete Event Systems, Sessions on Software Tools for DES, Ann Arbor, Michigan, USA, July 2006.
35. François Vernadat, Christian Percebois, Patrick Farail, R Vingerhoes, Alain Rossignol, Jean-Pierre Talpin, David Chemouil. The Topcased project - a toolkit in open-source for critical application and system development. In International Space System Engineering Conference, Eurospace, May 2006.
36. Christian Brunette, Jean-Pierre Talpin, Loïc Besnard, Thierry Gautier. Modeling multi-clocked data-flow programs using the Generic Modeling Environment. In Synchronous Languages, Applications, and Programming, Elsevier, March 2006.
37. Abdoulaye Gamatié, Thierry Gautier, Paul Le Guernic. Toward Static Analysis of SIGNAL Programs using Interval Techniques. In Synchronous Languages, Applications, and Programming, SLAP 2006, Florence Maraninchi, Marc Pouzet (eds.), Vienna, Austria, March 2006.
38. Hamoudi Kalla, Jean-Pierre Talpin, David Berner, Loïc Besnard. Automated translation of C/C++ programs into a synchronous formalism. In Engineering of Computer Based Systems, IEEE Press, March 2006.
39. Jean-Pierre Talpin, Sandeep Shukla. Automated clock inference for stream function-based system level specifications. In High-level design, validation and test workshop (HLDVT), IEEE Press, 2005.
40. Jean-Pierre Talpin, Dimitru Potop-Butucaru, Julien Ouy, Benoit Caillaud. From multi-clocked synchronous specifications to latency-insensitive systems. In Embedded Software Conference (EMSOFT), ACM Press, 2005.
41. Syed Suhaib, Deepak Mathaikutty, David Berner, Sandeep Shukla. Validating Families of Latency Insensitive Protocols. In To be published in Proceedings of the IEEE International High Level Design Validation and Test Workshop (HLDVT), Napa Valley, California, USA, November 2005.
42. David Berner, Hiren Patel, Deepak Mathaikutty, Sandeep Shukla. Automated Extraction of Structural Information from SystemC-based IP for Validation. In Proc. of 6th International Workshop on Microprocessor Test and Verification (MTV'05), Austin Texas, USA, November 2005.
43. Jean Bézivin, Christian Brunette, Régis Chevrel, Frédéric Jouault, Ivan Kurtev. Bridging the \textscGeneric \textscModeling \textscEnvironment and the \textscEclipse \textscModeling \textscFramework. In Proc. of the 4th workshop in Best Practices for Model Driven Software Development, OOPSLA, October 2005.
44. David Berner, Hiren Patel, Deepak Mathaikutty, Jean-Pierre Talpin, Sandeep Shukla. SystemCXML: An Extensible SystemC Front End Using XML. In Proceedings of the Forum on specification and design languages (FDL), Lausanne, Switzerland, September 2005.
45. Frederic Doucet, Massimiliano Menarini, Ingolf Kruger, Jean-Pierre Talpin, Rajesh Gupta. A verification approach for GALS integration of synchronous components. In Proceedings of the International Workshop on Formal Methods for Globally Asynchronous Locally Synchronous Design (FMGALS), Verona, Italy, July 2005.
46. Syed Suhaib, David Berner, Deepak Mathaikutty, Jean-Pierre Talpin, Sandeep Shukla. A Functional Programming Framework for Latency Insensitive Protocol Validation. In Proceedings of the International Workshop on Formal Methods for Globally Asynchronous Locally Synchronous Design (FMGALS), Verona, Italy, July 2005.
47. Julien Ouy. A survey of desynchronization in a polychronous model of computation. In Proceedings of the International Workshop on Formal Methods for Globally Asynchronous Locally Synchronous Design (FMGALS), Verona, Italy, July 2005.
48. Abdoulaye Gamatié, Thierry Gautier, Paul Le Guernic, Jean-Pierre Talpin. Dealing with Real-Time Issues within the Polychronous Framework. In Proceedings of the 17th Euromicro Conference on Real Time Systems (ECRTS'05), Work-in-Progress Session, Palma de Mallorca, Balearic Islands - Spain, July 2005.
49. Laurent Rioux, Thierry Saunier, Sebastien Gérard, A Radermacher, Robert De Simone, Thierry Gautier, Yves Sorel, J Forget, Jean-Luc Dekeyser, A Cuccuru, C Dumoulin, Charles André. MARTE: A New OMG Profile RFP for the Modeling and Analysis of Real-Time Embedded Systems. In DAC 2005 Workshop UML for SoC Design, UML-SoC'05, Anaheim CA, USA, June 2005.
50. Abdoulaye Gamatié, Thierry Gautier, Paul Le Guernic. Conception Synchrone d'Applications Avioniques par Raffinement de Modèles. In Proc. of the 13th International Conference on Real-time Systems (RTS'2005), Paris - France, April 2005.
51. D. Berner, J.P. Talpin, P. Le Guernic, S. K Shukla. Modular design through component abstraction. In International conference on compilers, architectures and synthesis for embedded systems, 2004.
52. J.P. Talpin, D. Berner, S. K. Shukla, A. Gamatié, P. Le Guernic, R. Gupta. A behavioral type inference system for compositional system-on-chip design. In Application of Concurrency to System Design, 2004.
53. M. Mousavi, P. Le Guernic, J.P. Talpin, S. Shukla, T. Basten. Modeling and validation of asynchronous systems in synchronous frameworks. In Design Analysis and Test Europe, 2004.
54. Syed Suhaib, Deepak Mathaikutty, David Berner, Sandeep Shukla. Extreme Formal Modeling (XFM) for Hardware Models. In 5th International Workshop on Microprocessor Test and Verification, September 2004.
55. A. Gamatié, T. Gautier, P. Le Guernic. An Example of Synchronous Design of Embedded Real-Time Systems based on IMA. In Proceedings of the 10th International Conference on Real-time and Embedded Computing Systems and Applications (RTCSA'2004), Gothenburg, Sweden, August 2004.
56. Mirabelle Nebut. Un langage d'horloge pour analyser et spécifier les réactions synchrones. In Approches Formelles pour l'Assistance au Développement de Logiciels (AFADL'03), 2003.
57. Jean-Pierre Talpin, Paul Le Guernic, S. K. Shukla, R. Gupta, F. Doucet. A polychronous model for high-level component-based system design. In Digital Automation and Test Europe, March 2003.
58. A. Benveniste, P. Caspi, Le Guernic Guernic P, H. Marchand, Jean-Pierre Talpin, S. Tripakis. A Protocol for Loosely Time-Triggered Architectures. In Proc. of 2002 Conference on Embedded Software (EMSOFT'02), J. Sifakis, A. Sangiovanni-Vincentelli (eds.), LNCS, Volume 2491, October 2002.
59. Abdoulaye Gamatié, Thierry Gautier. Modeling of Modular Avionics Architectures Using the Synchronous Language SIGNAL. In Proceedings of the Work In Progress session, 14th Euromicro Conference on Real Time Systems, ECRTS'02, Pages 25-28, June 2002.
60. Mirabelle Nebut. A Clock Language to Specify and Analyze Synchronous Data-Flow Specifications. In Actes de l'école d'été Movep'02, MOdélisation et Vérification des systèmes PArallèles, Nantes, France, June 2002.
61. Mirabelle Nebut, Sophie Pinchinat. A Decidable Clock Language for Synchronous Specifications. In Synchronous Languages, Applications, and Programming (SLAP'02), Volume 65, Grenoble, France, April 2002.
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187. T. Gautier, P. Le Guernic. L'environnement de programmation SIGNAL. In Proceedings of RENNES Sister Cities Computer Science Research Centers Workshop, Pages 168-175, April 1991.
188. M. Le Borgne, A. Benveniste, P. Le Guernic. Polynomial dynamical systems over finite fields. In Algebraic Computing in control, Volume 165, Pages 212-222, March 1991.
189. . Tight Bounds on the Complexity of Cascaded Decomposition of Automata. In Proc. 31st Annual Symposium on Foundations of Computer Science, Pages 672-682, 1990.
190. F. Jiménez, E. Rutten. Pages 171-176, 0.
191. Thierry Gautier, Paul Le Guernic, Jean-Pierre Talpin. Polychronous Design of Real-Time Applications with SIGNAL. In ARTIST Survey of Programming Languages, Alan Burns (ed.), 0.
192. S. Donikian, E. Rutten. Reactivity, concurrency, data flow and hierarchical preemption for behavioral animationn. In Proceedings of the 5th Eurographics Workshop on Programming Paradigms in Graphics. R.C. Veltkamp, E.H. Blake (eds.), Programming Paradigms in Graphics, Springer, Computer Science, 169 Maastricht, the Netherlands, September 0.

Research Reports

1. Virginia Papailiopoulou, Dumitru Potop-Butucaru, Yves Sorel, Robert De Simone, Loic Besnard, Jean-Pierre Talpin. From concurrent multi-clock programs to concurrent multi-threaded implementations. Research Report INRIA, No 0, March 2011. download
2. Kenneth Johnson, Loic Besnard, Thierry Gautier, Jean-Pierre Talpin. A Synchronous Approach to Threaded Program Verification. Research Report INRIA, June 2010.
3. Yann Glouche, Paul Le Guernic, Jean-Pierre Talpin, Thierry Gautier. A boolean algebra of contracts for logical assume-guarantee. Research Report INRIA, 2008.
4. Jean-Pierre Talpin, Julien Ouy, Loïc Besnard, Paul Le Guernic. Compositional design of isochronous systems. 2007. download
5. Christian Brunette, Romain Delamare, Abdoulaye Gamatié, Thierry Gautier, Jean-Pierre Talpin. A Modeling Paradigm for Integrated Modular Avionic Design. Research Report INRIA, No 5715, October 2005.
6. Abdoulaye Gamatié, Thierry Gautier, Paul Le Guernic, Jean-Pierre Talpin. Polychronous Design of Embedded Real-Time Systems. Research Report INRIA, No 5509, March 2005.
7. Eric Rutten, Hervé Marchand. Using discrete control synthesis for safe robot programming. Research Report INRIA, 2002.
8. Abdoulaye Gamatié, Thierry Gautier. Synchronous Modeling of Modular Avionics Architectures using the SIGNAL Language. Research Report Irisa, No 0, December 2002.
9. Mirabelle Nebut, Sophie Pinchinat, Paul Le Guernic. A Model for the Verification of Static Synchronous Data-flow Specifications. Research Report Irisa, No 1402, 2001.
10. Jean-Pierre Talpin. A simplified account of region inference. rr Inria, No 4104, September 2001.
11. B. Caillaud, J. P. Talpin, J.M. Jezequel, A. Benveniste, C. Jard. BDL: a semantics backbone for UML dynamic diagrams. Research Report Inria, No 4003, September 2000.
12. H Marchand, O. Boivineau, S. Lafortune. Optimal control of discrete event systems under partial observation. Research Report CGR-00-10, Control Group, College of Engineering, University of Michigan, USA, September 2000.
13. B. Caillaud, J.P. Talpin, J.M. Jezequel, A. Benveniste, C. Jard. BDL: a semantics backbone for UML dynamic diagrams. rr Inria, No 4003, September 2000.
14. Y. Wang, J. P. Talpin, A. Benveniste, P. Le Guernic. Pre-order semantics of UML state machines. Research Report Irisa, No 1336, June 2000.
15. J.P Talpin. Research Report Irisa, No 1305, March 2000.
16. J. P. Talpin. Synchronous modeling and asynchronous deployment of mobile processes. rr Inria, No 3893, March 2000.
17. A. Benveniste, P. Caspi. Distributing synchronous programs on a loosely synchronous, distributed architecture. Research Report Irisa, No 1289, December 1999.
18. J.-P. Talpin, A. Benveniste, B. Caillaud, P. Le Guernic. Hierarchic Normal Forms for desynchronization. Research Report Irisa, No 1288, December 1999.
19. S. Tudoret. Signal-Simulink : Hybrid System Co-simulation. Research Report Linköping, No 20, December 1999. download
20. A. Benveniste, P. Caspi, S. Tripakis. Distributing synchronous programs on a loosely synchronous, distributed architecture. Rapport de recherche Irisa, No 1289, December 1999.
21. S. Pinchinat, H. Marchand, M. Le Borgne. Symbolic Abstractions of Automata and their application to the Supervisory Control Problem. Research Report Irisa, No 1279, November 1999.
22. M. Kerboeuf, D. Nowak, J.-P. Talpin. The steam-boiler problem in SIGNAL-COQ. Research Report Irisa / Inria-Rennes, No 3773, October 1999.
23. H. Marchand, M. Le Borgne. The Supervisory Control Problem of Discrete Event Systems using polynomial Methods. Research Report Irisa, No 1271, October 1999.
24. J.-P. Talpin, A. Benveniste, P. Le Guernic. Asynchronous deployment of synchronous transition systems. Research Report Irisa, No 1269, October 1999.
25. A. Benveniste, B. Caillaud, P. Le Guernic. From synchrony to asynchrony. Research Report Irisa, No 1233, March 1999.
26. O. Kouchnarenko, S. Pinchinat. Intensional Approaches for Symbolic Methods. Research Report Irisa / Inria-Rennes, No 3448, July 1998.
27. H. Marchand, O. Boivineau, S. Lafortune. On the Synthesis of Optimal Schedulers in Discrete Event Control Problems with Multiple Goals. Research Report CGR-98-10, Control Group, College of Engineering, Univeristy of Michigan, USA, July 1998.
28. J.R. Beauvais, R. Houdebine, P. Le Guernic, E. Rutten, T. Gautier. A translation of Statecharts and Activitycharts into Signal equations. Research Report Irisa / Inria-Rennes, No 3397, April 1998.
29. J.P. Talpin, A. Benveniste, B. Caillaud, C. Jard, Z. Bouziane, H. Canon. BDL, a language of distributed reactive objects. Research Report Irisa / Inria-Rennes, No 3353, February 1998.
30. M. Allemand, F. Bodin, A. Kountouris, P. Le Guernic, J.C. Le Lann, A. Seznec, C. Wolinski. A Synchronous Approach for Hardware Design. Research Report Irisa, No 1131, 1997.
31. A. Benveniste, P. Le Guernic, P. Aubry. Compositionality in dataflow synchronous languages: specification & code generation. Research Report Irisa / Inria-Rennes, No 3310, November 1997.
32. H. Marchand, M. Le Borgne. Partial Order Control and Optimal Control of Discrete Event Systems modeled as Polynomial Dynamical Systems over Galois fields. Research Report Irisa, No 1125, October 1997.
33. P. Bournai, M. Le Borgne, H. Marchand. Environnement de conception d'automatismes discrets basé sur le langage Signal. Research Report Irisa, No 1124, September 1997.
34. D. Nowak, J.P. Talpin, T. Gautier. Un système de modules avancé pour Signal. Research Report Irisa / Inria-Rennes, No 3176, June 1997.
35. I. Smarandache, P. Le Guernic. A Canonical Form for Affine Relations in Signal. Research Report Irisa / Inria-Rennes, No 3097, February 1997.
36. A. Kountouris, C. Wolinski. A real-time hw/sw co-design approach based on the language and its environment. Research Report Irisa, No 1053, October 1996.
37. G. Paller, C. Wolinski. Springplay : répartition et ordonnancement de tâches pour leur exécution en « pipeline ». Research Report Irisa, No 1052, October 1996.
38. D. Chauveau, M. Bons. Simulation d'un circuit électro-domestique en Signal. Research Report Irisa, No 971, November 1995.
39. T. Amagbegnon, P. Le Guernic, H. Marchand, E. Rutten. The Signal data flow methodology applied to a production cell. Research Report Irisa, No 917, March 1995.
40. H. Marchand, E. Rutten, M. Samaan. Specifying and verifying a transformer station in Signal and Signalgti. Research Report Irisa, No 916, March 1995.
41. E. Marchand, E. Rutten, F. Chaumette. Applying the Synchronous Approach to Real Time Active Visual Reconstruction. Research Report Inria, No 2383, November 1994.
42. T. Gautier, P. Le Guernic, O. Maffeis. For a New Real-Time Methodology. Research Report Inria, No 2364, October 1994.
43. A. Benveniste, B.C. Levy, E. Fabre, P. Le Guernic. A calculus of stochastic systems for the specification, simulation, and hidden state estimation of hybrid stochastic/nonstochastic systems. Research Report Irisa, No 837, July 1994.
44. T. Amagbegnon, L. Besnard, P. Le Guernic. Arborescent Canonical Form of Boolean Expressions. Research Report Inria, No 2290, June 1994.
45. T. Gautier, P. Le Guernic, F. Dupont. SIGNAL V4 : manuel de référence. Research Report Irisa, No 832, June 1994.
46. B. Houssais, M. Le Borgne, P. Le Guernic. Cours de programmation en langage temps-réel SIGNAL. Research Report Irisa, June 1994.
47. P. Bournai, C. Lavarenne, P. Le Guernic, O. Maffeis, Y. Sorel. Interface SIGNAL-SynDEx. Research Report Inria, No 2206, March 1994.
48. H. Marchand, M. Le Borgne. Typage des graphes de décisions ternaires. Research Report Irisa, No 797, March 1994.
49. O. Maffeis, P. Le Guernic. From Synchronous-Flow Dependence Graphs to Reliable and Efficient Implementations. Research Report Ercim, No 2, February 1994.
50. B. Dutertre, M. Le Borgne. Control of Polynomial Dynamic Systems: an Example. Research Report Inria, No 2193, January 1994.
51. E. Marchand, F. Chaumette, E. Rutten. Stratégie perceptive d'un environnement statique dans un contexte de vision active. Research Report Irisa, No 775, November 1993.
52. E. Rutten, P. Le Guernic. Sequencing data flow tasks in SIGNAL. Research Report Irisa / Inria-Rennes, No 2120, November 1993.
53. A. Benveniste, P. Caspi, P. Le Guernic, N. Halbwachs. Data-flow Synchronous Languages. Research Report Irisa / Inria-Rennes, No 2089, October 1993.
54. P. Bournai, B. Chéron, T. Gautier, B. Houssais, P. Le Guernic. SIGNAL manual. Research Report Irisa / Inria-Rennes, No 1969, September 1993.
55. P. Bournai, P. Le Guernic. Un environnement graphique pour le langage SIGNAL. Research Report Irisa / Inria-Rennes, No 2040, September 1993.
56. C. Wolinski, M. Belhadj. Vers la synthèse automatique de programmes SIGNAL. Research Report Irisa, No 746, July 1993.
57. C. Wolinski, T. Cholet, D. Derrien, J.P. Guillou, P. Leali, A. Riboult. Une architecture pour l'exécution d'applications SIGNAL. Research Report Irisa, No 704, February 1993.
58. T. Gautier, P. Le Guernic. Signal V4: Manuel de Référence. Research Report Irisa, 1992.
59. O. Maffeis, B. Cheron, P. Le Guernic. Transformations du graphe des programmes Signal. Research Report Irisa, No 619, November 1992.
60. A. Benveniste, M. Le Borgne, P. Le Guernic. Signal as a model for Real-Time and Hybrid Systems. Research Report irisa, No 624, January 1992.
61. O. Maler, Z. Manna, A. Pnueli. From Timed to Hybrid Systems. Research Report Stanford University, No 0, January 1992.
62. B. Delyon, O. Maler. On Fault-Tolerant Symbolic Computations. Research Report Irisa, No 615, November 1991.
63. A. Benveniste. Constructive Probability and the Signalea : language: building and handling random processes via programming. Research Report Inria, No 1532, October 1991.
64. B. Dutertre, P. Le Guernic. Description et simulation d'un système de passage niveau en SIGNAL. Research Report Inria, No 1437, May 1991.
65. A. Benveniste, G. Berry. The Synchronous Approach to Reactive and Real-Time Systems. Research Report Irisa, No 581, April 1991.
66. P. Le Guernic, T. Gautier, M. Le Borgne, C. Le Maire. Programming Real-Time Applications with Signal. Research Report Irisa, No 582, April 1991.
67. P. Bournai, B. Chéron, T. Gautier, B. Houssais, P. Le Guernic. Manuel SIGNAL. Research Report Irisa, No 575, February 1991.

Misc

1. F. Dupont, L. Besnard, J.-P Talpin. Outillage du langage de modélisation Synoptic en vue de la simulation. Deliverable SPa4, Projet ANR Spacify, 2009.
2. J. Ouy, J.-P Talpin. Transformation de modèles Synoptic vers Signal/SME. Deliverable SPa4b, Projet ANR Spacify, 2009.
3. L. Besnard, T. Gautier, J.-P Talpin. Code generation strategies for Synoptic using the Polychrony platform. Deliverable SPa5b, Projet ANR Spacify, 2009.
4. Object Management Group Management Group. A UML Profile for MARTE, Beta 1. Document n. ptc/07-08-04, 2007. download
5. Erik Herzog, Eldad Palachi, Masoud Zarkari, Thierry Gautier, Susanne Graf, Michael Winokur, Vered Gafni. Assessment of Existing Standards. Deliverable D.2.5.1, 2007.
6. Julio Peralta. Bridging Signal with the CADP model checker, a preliminary study. Deliverable F342, 2007.
7. . UML Profile for Modeling and Analysis of Real-Time and Embedded Systems (RT/E-ML. October 2004.
8. L. Besnard, T. Gautier, P. Le Guernic. SIGNAL V4-INRIA version: Reference Manual. March 2004.
9. SafeAir team team. Final report. 2002.
10. L. Besnard, T. Gautier, P. Le Guernic. SIGNAL V4-INRIA version: Reference Manual. December 2002.
11. L. Besnard, T. Gautier, Q. Pan, C. Macabiau, Y. Sorel. SIGNAL-SynDEx translation, V1.0. June 2002.
12. B. Houssais. The Synchronous Programming Language SIGNAL, A Tutorial. April 2002.
13. H. Marchand. Utilisation de Signal/Sigali pour la synthèse de séquences d'attaque et la simulation + Synthèse de systèmes hérarchiques. Rapport de convention CASTOR, 2001.
14. T. Le Sergent, J.L. Camus, F. Dupont, T. Gautier, P. Le Guernic, H. Hungar, K. Winkelmann, O. Shtrichman, M. Cohen. ASDE V1.0 specification. March 2001.
15. . Design and Implementation of Architecture Components. February 2001.
16. . Component performance evaluation. February 2001.
17. T. Le Sergent, J. L. Camus, F. Dupont, T. Gautier, P. Le Guernic, H. Hungar, K. Winkelmann, O. Shtrichman, M. Cohen. ASDE V0.9 specification. June 2000.
18. T. Gautier, P. Le Guernic. SCADE-SIGNAL languages Compatibility. May 2000.
19. S. Pinchinat, H. Marchand, M. Le Borgne. Deliverable 3.1.3: Symbolic Abstractions of Automata and their application to the Supervisory Control Problem. Esprit project 22703: Syrf, October 1999.
20. T. Gautier, X. Méhaut. SSL Implementation: DC+ => SSL translation. Esprit project EP 20897: Sacres, November 1998.
21. A. Benveniste, H. Brix, W. Damm, F. Dupont, A. Grazebrook, H. Holberg, P. Le Guernic, J. Rowlands, E. Rutten, E. Sefton, K. Winkelmann. The Sacres design methodology for safety critical systems. Esprit project EP 20897: Sacres, November 1998.
22. S. Pinchinat, O. Kouchnarenko, H. Marchand, M. Le Borgne. Deliverable 3.1.2: Symbolic abstraction of automata: intensional Labeled Transition Systems, symbolic bisimulation. Esprit project 22703: Syrf, October 1998.
23. Syrf Consortium. Deliverable 4/5.1 - Integrating synchrony & asynchrony: fundamentals. Esprit project 22703: Syrf, October 1998.
24. Syrf Consortium. Deliverable 4/5.2 - Integrating synchrony & asynchrony: distributed code generation. Esprit project 22703: Syrf, October 1998.
25. A. Benveniste, T. Gautier, F. Jiménez, P. Le Guernic, S. Machard, E. Rutten. Méthodes de distribution de code Signal et Dc+. Convention INRIA - EdF P33/6A4575/EP871, June 1998.
26. Sacres Consortium. Task I1.1A: StateMate integration - the stm2dcplus translator. Esprit project EP 20897: Sacres, April 1998.
27. J.R. Beauvais, R. Houdebine, P. Le Guernic, E. Rutten, T. Gautier. Task I1.1A: StateMate integration - A translation of Statecharts and Activitycharts into Signal equations. Esprit project EP 20897: Sacres, April 1998.
28. Sacres Consortium. The Declarative Code DC+, Version 1.4. Esprit project EP 20897: Sacres, November 1997.
29. H. Marchand, M. Le Borgne. Systèmes dynamiques polynomiaux sous observations partielles. Rapport de fin de contrat, Convention Inria - EdF No P33L99/6A1821/EP819, October 1997.
30. Sacres Consortium. Deliverable Report C2.A: Mapping Code To Architecture. Esprit project EP 20897: Sacres, September 1997.
31. Sacres Consortium. Deliverable Report I3.B: SacresSystem Architecture Definition. Esprit project EP 20897: Sacres, September 1997.
32. P. Bournai, M. Le Borgne, H. Marchand, P. Le Guernic. Démonstrateur de synthèse de systèmes d'automatismes décrits en Signal. Rapport de fin de contrat, Convention Inria - EdF No 196C5030031307 01 1, July 1997.
33. Sacres Consortium. DC+ syntactic level: specification. Esprit project EP 20897: Sacres, April 1997.
34. Sacres Consortium. DC+ graph level: specification. Esprit project EP 20897: Sacres, April 1997.
35. Sacres Consortium. Deliverable Report I2.A: The Sacres Design Methodology for Safety Critical Systems. Esprit project EP 20897: Sacres, April 1997.
36. Sacres Consortium. The Semantics Foundations of Sacres. Esprit project EP 20897: Sacres, April 1997.
37. Sacres Consortium. Deliverable Report C1.A: Code Generation. Esprit project EP 20897: Sacres, February 1997.
38. H. Marchand. Intégration de Sigali dans l'environnement Signal. Rapport de fin de contrat, Convention Inria - EdF No M64/7C8321/E5/11, December 1996.
39. H. Marchand, M. Le Borgne. Extension de la théorie de synthèse de contrôleurs sur des systèmes dynamiques polynômiaux. Convention Inria - EdF No M64/7C8321/E5/11, June 1996.
40. T. Gautier, P. Le Guernic, P. Quinton, S. Rajopadhye, T. Risset, I. Smarandache. Le projet CAIRN: vers la conception d'architectures à partir de Signal et Alpha. June 1996.
41. Sacres Consortium. Deliverable Report B2.A: Architecture Baseline. May 1996.
42. Sacres Consortium. The Declarative Code DC+, version 1.2. May 1996.
43. Sacres Consortium. Deliverable Report B3.A: New Technologies Baseline. May 1996.
44. D. Chauveau, A. Benveniste, B.C. Levy, E. Fabre. A Calculus of Stochastic Systems and the Signalea formalism. May 1996.
45. Sacres Consortium. Deliverable Report B1.A: Requirements Baseline. February 1996.
46. M. Le Borgne, H. Marchand. Méthodologie de conception d'automatismes séquentiels. Convention Inria - EdF No M64/7C8321/E5/11, November 1995.
47. H. Marchand, M. Le Borgne, M. Samaan. Méthodes de vérification et de synthèse sur des systèmes dynamiques polynômiaux, appliquées au modèle physique d'un poste de transformation électrique. Convention Inria - EdF No M64/7C8321/E5/11, July 1995.
48. H. Marchand, E. Rutten, M. Samaan. Description, spécification et validation d'un automatisme de poste de transformation électrique. Convention Inria - EdF No M64/7C8321/E5/11, December 1994.
49. J-P. Paris, G. Berry, F. Mignard, P. Couronné, P. Caspi, N. Halbwachs, Y. Sorel, A. Benveniste, T. Gautier, P. Le Guernic, F. Dupont, C. Le Maire. Projet synchrone : les formats communs des langages synchrones. Rapport technique IRISA No 157, No 157, June 1993.
50. L. Besnard, M. Moy, F. Maraninchi, J.-P. Talpin. 0. download

PhD Thesis

1. Y. Ma. Compositional modeling of globally asynchronous locally synchronous (GALS) architectures in a polychronous model of compotation. PhD Thesis, 2010. download
2. Y. Glouche. Une méthodologie de spécification et de validation de systèmes hétérogènes fondée sur un modèle de contrats pour la conception des systèmes embarqués. PhD Thesis, 2009. download
3. J. Ouy. Génération de code asynchrone dans un environnement polychrone pour la production de systèmes GALS. PhD Thesis, 2008.
4. A. Gamatié. Modélisation polychrone et évaluation de systèmes temps réel. PhD Thesis, May 2004.
5. Mickaël Kerboeuf. Orientation objet d'un calcul de processus synchrones. PhD Thesis Université de Rennes 1, IFSIC, December 2002.
6. Mirabelle Nebut. Réactions synchrones : spécification et analyse. PhD Thesis Université de Rennes 1, IFSIC, November 2002.
7. Jean-Christophe Le Lann. Simulation et synthèse de circuits s'appuyant sur le Modèle Synchrone. PhD Thesis Université de Rennes 1, IFSIC, March 2002.
8. Y. Wang. UML et technologie synchrone pour les systèmes réactifs distribués. PhD Thesis Ifsic, Université de Rennes 1, December 2001.
9. F. Jiménez. Conception sûre des automatismes industriels : modélisation synchrone de langages d'automates programmables de la norme CEI-61131-3. PhD Thesis Université de Rennes 1, IFSIC, March 2001.
10. C. Wolinski. Conception conjointe matériels/logiciels. Habilitation à diriger des recherches Ifsic, Université de Rennes 1, September 2000.
11. C. Wolinski. Conception conjointe matériels/logiciels. Habilitation à diriger des recherches Ifsic, Université de Rennes 1, September 2000.
12. E. Rutten. Programmation sûre des systèmes de contrôle/commande: le séquencement de tâches flot de données dans les langages réactifs. Habilitation à diriger des recherches Ifsic, Université de Rennes1, December 1999.
13. D. Nowak. Spécification et preuve de systèmes réactifs. PhD Thesis Université de Rennes 1, IFSIC, October 1999.
14. J.R. Beauvais. Modélisation de StateCharts en Signal pour la conception de systèmes critiques temps-réel. PhD Thesis Université de Rennes 1, IFSIC, January 1999.
15. A. Kountouris. Outils pour la validation temporelle et l'optimisation de programmes synchrones. PhD Thesis Université de Rennes 1, IFSIC, October 1998.
16. I. Smarandache. Transformations affines d'horloges: application au codesign de systèmes temps-réel en utilisant les langages Signal et Alpha. PhD Thesis Université de Rennes 1, IFSIC, October 1998.
17. P. Aubry. Mises en oeuvre distribuées de programmes synchrones. PhD Thesis Université de Rennes 1, IFSIC, October 1997.
18. H. Marchand. Méthodes de synthèse d'automatismes décrits par des systèmes à événements discrets finis. PhD Thesis Université de Rennes 1, IFSIC, October 1997.
19. D. Chauveau. Étude d'une extension du langage synchrone SIGNAL aux modèles probabilistes : le langage SIGNalea. PhD Thesis Université de Rennes 1, December 1996.
20. T. Amagbegnon. Forme canonique arborescente deshorloges de Signal. PhD Thesis université de Rennes 1, November 1995.
21. G. Paller. RAFAEL: An Intelligent, Multi-Target Signal-Flow compiler. PhD Thesis Université Technique de Budapest, September 1995.
22. M. Belhadj. Conception d'architectures en utilisant Signal et VHDL. PhD Thesis Université de Rennes I, IFSIC, December 1994.
23. M. Le Borgne. Systèmes dynamiques sur des corps finis. PhD Thesis Université de Rennes I, IFSIC, September 1993.
24. O. Maffeis. Ordonnancements de graphes de flots synchrones ; application à la mise en oeuvre de SIGNAL. PhD Thesis Université de Rennes I, IFSIC, January 1993.
25. B. Dutertre. Spécification et preuve de systèmes dynamiques. PhD Thesis Université de Rennes I, IFSIC, December 1992.
26. L. Besnard. Compilation de Signal: horloges, dépendances, environnements. PhD Thesis Université de Rennes I, IFSIC, September 1992.
27. B. Chéron. Transformations syntaxiques de Programmes Signal. PhD Thesis Université de Rennes I, IFSIC, September 1991.
28. C. Le Maire. Environnement de Programmation Synchrone en Reconnaissance de la Parole. PhD Thesis université de Rennes1, December 1990.
29. B. Le Goff. Inférence de contrôle hiérarchique : application au temps réel. PhD Thesis Université de Rennes I, IFSIC, 1989.

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