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Publications of Apostolos Kountouris


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PhD Theses

  1. A. Kountouris.
    Outils pour la validation temporelle et l'optimisation de programmes synchrones.  Phd thesis, Université de Rennes 1, IFSIC, October 1998. (postscript) (abstract)

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Journals

  1. A. Kountouris, C. Wolinski, J.C. Le Lann.
    High-Level Synthesis Using Hierarchical Conditional Dependency Graphs in the CODESIS System.  EUROMICRO Journal of Systems Architecture on Modern Methods and Tools in Digital System Design, 2000.

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International Conferences

  1. A. Kountouris, C. Wolinski.
    Efficient Scheduling of Conditional Behaviors Using Hierarchical Conditional Dependency Graphs in CODESIS System.  Proceedings of EUROMICRO'00, IEEE Computer Society Press, pages 222--229, Maastricht, The Netherlands, September 2000.
  2. A. Kountouris, C. Wolinski.
    Hierarchical Conditional Dependency Graphs as a Unifying Design Representation in the CODESIS High-Level Synthesis System.  Proceedings of ISSS'00, IEEE Computer Society Press, pages 66--71, Madrid, Spain, September 2000.
  3. A. Kountouris, C. Wolinski.
    High-level Pre-synthesis Optimization Steps using Hierarchical Conditional Dependency Graphs.  Proceedings of the EUROMICRO'99, IEEE Computer Society Press, Milan, Italie, August 1999.
  4. A. Kountouris, C. Wolinski.
    Hierarchical Conditional Dependency Graphs for Mutual Exclusiveness Identification.  12th International Conference on VLSI Design, Goa, India, January 1999.
  5. A. Kountouris, C. Wolinski.
    Combining Speculative Execution and Conditional Resource Sharing to Efficiently Schedule Conditional Behaviors.  ASP-DAC'99, Hong Kong, January 1999.
  6. A. Kountouris, C. Wolinski.
    False Path Analysis based on a Hierarchical Control Representation.  Proceedings of ISSS'98, Hsinchu, Taiwan, R.O.C., December 1998. (postscript)
  7. A. Kountouris, C. Wolinski.
    Hierarchical Conditional Dependency Graphs for Conditional Resource Sharing.  Proceedings of Euromicro'98, IEEE Computer Society Press, Vasteras, Sweden, August 1998. (postscript)
  8. A. Kountouris, C. Wolinski.
    A Method for the Generation of HDL Code at the RTL level form a High-Level Formal Specification Language.  Proceedings of MWSCAS'97, IEEE Computer Society Press, Sacramento, August 1997. (postscript)
  9. A. Kountouris.
    Safe and Efficient Elimination of Infeasible Execution Paths in WCET Estimation.  Proceedings of the International Workshop in R/T Computing Systems and Applications (RTCSA'96), IEEE Computer Society Press, Seoul, South Korea, November 1996. (postscript)
  10. A. Kountouris, P. Le Guernic.
    Profiling of SIGNAL Programs and its application in the timing evaluation of design implementations.  Proceedings of the IEE Colloq. on HW-SW Cosynthesis for Reconfigurable Systems, IEE, pages 6-6, HP Labs, Bristol, UK, February 1996. (postscript)

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Research reports

  1. M. Allemand, F. Bodin, A. Kountouris, P. Le Guernic, J.C. LeLann, A. Seznec, C. Wolinski.
    A Synchronous Approach for Hardware Design.  Research report Irisa, No1131, 1997. (postscript) (abstract)
  2. A. Kountouris, C. Wolinski.
    A real-time hw/sw co-design approach based on the language and its environment.  Research report Irisa, No1053, October 1996. (postscript) (abstract)
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