Conférences Internationales
2000
  1. D. Lavenier, J. Theiler, J. Szymanski, M. Gokhale, J. Frigo. FPGA Implementation of the Pixel Purity Index Algorithm for Hyper-Spectral images.  SPIE Photonics East, Workshop on Reconfigurable Architectures, Boston, MA, USA , Novembre 2000.
  2. P. Quinton, C. Tadonki, M. Tchuente. Un échéancier systolique et son utilisation dans l'ATM.  CARI'2000, Octobre 2000.
  3. J. Theiler, D. Lavenier, N. Harvey, S. Perkins, J. Szymanski. Using blocks of skewers for faster computation of pixel purity index.  SPIE International Conference on Optical Science and Technology, San Diego, CA, USA, Août 2000.
  4. J. Szymanski et al. Advanced processing for high-bandwith sensor systems.  SPIE International Conference on Optical Science and Technology, San Diego, CA, USA, Août 2000.
  5. E. Fabiani, D. Lavenier. Placement of Linear Arrays.  FPL 2000, 10th International Conference on Fiels Programmable Logic and Applications, Villach, Austria, Août 2000.
  6. A-C. Guillou, P. Quinton, T. Risset, D. Masicotte. Automatic Design of VLSI Pipelined LMS Architectures.  Parelec'2000, pages 144-149, Août 2000.
  7. S. Derrien, S. Sur Kolay, S. Rajopadhye. Optimal Partitioning for FPGA based Arrays Implementation.  IEEE Conference on Parallel Computing in Electrical Engineering, pages 155-159, Août 2000.
  8. R. Andonov, P-Y. Calland, S. Rajopadhye, N. Yanev. First Steps Towards Optimal Oblique Tile Sizing.  CPS 2000: Compilers for Parallel Computers, A. Darte, Y. Robert (eds.), pages 353-368, Aussois, France, Janvier 2000.
1999
  1. S. Rajopadhye, T. Risset, C. Tadonki. The Algebraic Path Problem Revisited.  Fifth International Euro-Par Conference, pages 698-707, Toulouse, France, Août 1999.
  2. A. Mozipo, D. Massicote, P. Quinton, T. Risset. Automatic Synthesis of a Parallel Architecture for Kalman Filtering using MMAlpha.  1999 IEEE Canadian Conference on Electrical & Computer Engineering, Edmonton, Canada, Mai 1999.
  3. A. Mozipo, D. Massicote, P. Quinton, T. Risset. A Parallel Architecture for Adaptative Channel Equalization Based On Kalman Filter Using MMAlpha.  1999 IEEE Canadian Conference on Electrical & Computer Engineering, Calgary, Canada, Mai 1999.
1998
  1. P. Quinton. Conception de systèmes complets sur des circuits intégrés.  CARI'98, M. Tchuente (ed.), Presses universitaires de Dakar, INRIA, Dakar, Sénégal, Octobre 1998.
  2. D. Lavenier, Y. Saouter. Computing Goldbach partitions using pseudo-random bit generator operators on a FPGA systolic array.  FPL'98: Eight International Workshop on Field Programmable Logic and Applications, Tallin, Septembre 1998.
  3. A. Mozipo, D. Massicote, P. Quinton, T. Risset. Automatic Synthesis of a Parallel Architecture for Kalman Filtering using MMAlpha.  International Conference on Parallel Computing and Electrical Engineering (Parelec'98), Technical University of Byalystok, pages 201-205, Byalystok, Pologne, Septembre 1998.
  4. R. Andonov, S. Rajopadhye, N. Yanev. Optimal Orthogonal Tiling.  Fourth International Euro-Par Conference, D. Pritchard, J. Reeve (eds.), pages 480-490, Southampton, UK, Septembre 1998.
  5. E. Fabiani, D. Lavenier, L. Perraudeau. Loop Parallelization on a Reconfigurable Coprocessor.  WDTA'98: Workshop on Design, Test and Applications, Dubrovnik, Juin 1998.
  6. S. Balev, P. Quinton, S. Rajopadhye, T. Risset. Linear Programming Models for Scheduling Systems of Affine Recurrence Equations: A Comparative Study.  SPPA-98: Tenth ACM Symposium on Parallel Algorithms and Architectures, pages 250-258, Puerto Vallarta, Mexique, Juin 1998.
1997
  1. D. Lavenier, J.L. Pacherie. Parallel Processing for Scanning Genomic Data-Bases.  PARCO'97, Bonn, Septembre 1997.
  2. F. Dupont de Dinechin, T. Risset, S. Robert. Hierarchical Static Analysis for Improving the Complexity of Linear Algebra Algorithms.  PARCO'97, Bonn, Septembre 1997.
1996
  1. R. Andonov, H. Bourzoufi, S. Rajopadhye. Two-dimensional Orthogonal Tiling: from Theory to Practice.  International Conference on High Performance Computing, Décembre 1996.
  2. F. Dupont de Dinechin, S. Robert. Hierarchical Static Analysis of Structured Systems of Affine Recurrence Equations.  Application Specific Array Processors, IEEE Computer Society Press, Chicago, Août 1996.
  3. P. Guerdoux-Jamet, D. Lavenier, C. Wagner, P. Quinton. Design and Implementation of a Parallel Architecture for Biological Sequence Comparison.  EURO-PAR'96 Parallel Processing, L. Bougé et al. (ed.), LNCS, pages 11-24, Août 1996.
  4. D. Wilde, S. Rajopadhye. Memory Reuse Analysis in the Polyhedral Model.  EUROPAR 96: Parallel Processing Conference, Springer Verlag, pages 389-397, Lyon, France, Août 1996.
  5. P. Le Moënner, L. Perraudeau, S. Rajopadhye, T. Risset, P. Quinton. Generating Regular Arithmetic Circuits with AlpHard.  Massively Parallel Computing Systems (MPCS'96), Ischia, Italie, Mai 1996.
  6. P. Quinton, S. Rajopadhye, T. Risset. Extension of the Alpha language to recurrences on sparse periodic domains.  Int. Conf. on Application Specific Array Processors, Chicago, 1996.
1995
  1. F. Dupont de Dinechin, P. Quinton, T. Risset. Structuration of the Alpha Langage.  International Conference on Massively Parallel Programming Models, Berlin, Octobre 1995.
  2. P. Lenders, S. Rajopadhye. Synthesis of Multirate VLSI Arrays.  International Conference on Application Specific Array Processors - ASAP'95, IEEE Computer Society Press, pages 310-321, Strasbourg, Juillet 1995.
  3. P. Guerdoux-Jamet, D. Lavenier. Systolic Filter for Fast DNA Similarity Search.  International Conference on Application Specific Array Processors - ASAP'95, pages 145-156, Strasbourg, Juillet 1995.
  4. R. Barzic, C. Bouville, F. Charot, G. Le Fol, P. Lemonnier, C. Wagner. Movie: a building block for the design of real time simulators of moving pictures compression algorithms.  International Conference on Application Specific Array Processors - ASAP'95, pages 193-203, Strasbourg, Juillet 1995.
1994
  1. É. Gautrin, O. Sié. A new cell placement algorithm for optimal linear layout.  2ème Colloque Africain sur la Recherche en Informatique - CARI'94, Ouagadougou, Octobre 1994.
  2. P. Quinton. Towards a multi-formalism framework for architectural synthesis: the ASAR.  Codes/CASHE'94, pages 25-32, Grenoble, France, Septembre 1994.
  3. A. Kerihuel, R. McConnell, S. Rajopadhye. VSDF: synchronous data flow for VLSI.  Proceedings of the 37th Midwest Symposium on Circuits and Systems, Lafayette, Louisiane, Août 1994. (abstract)
  4. C. Dezan, P. Quinton. Verification of regular architectures using Alpha.  ASAP'94, IEEE Computer Society Press, pages 164-176, San Francisco, Août 1994.
  5. D. Wilde, O. Sié. Regular Array Synthesis using Alpha.  International Conference on Application Specific Array Processors - ASAP'94, pages 200-211, San Fancisco, Août 1994.
  6. É Memin, F. Heitz, F. Charot. Efficient parallel multigrid relaxation algorithms for markov random field-based low-level vision applications.  IEEE Conference on Computer Vision and Pattern Recognition, pages 644-648, Seattle USA, Juin 1994.
  7. J.P. Banâtre, D. Lavenier, M. Vieillot. From high level programming model to FPGA machines.  FPGAs for Custom Computing Machines, pages 119-124, Napa Valley, California, Avril 1994.
  8. J. Champeau, É. Gautrin, L. Le Pape, L. Perraudeau, B. Pottier, S. Rubini. Flexible parallel FPGA-based architectures with ArMen.  Twenty-seventh Hawaii International Conference of System Sciences, pages 105-113, Hawaii, Janvier 1994.
  9. R. Andonov, P. Quinton, S. Rajopadhye, D. Wilde. A shift register based implementation of the knapsack problem recurrences.  Parcella'94, Akademie Verlag, pages 207-214, 1994.
  10. P. Quinton. Systolic arrays: why and how?.  Parcella' 94, Akademie Verlag, pages 39-50, 1994.

Webmaster : cosi_webmaster@irisa.fr
Ces pages sont créées automatiquement par le
programme bib2html du projet Vista de l'IRISA-INRIA Rennes