Publications de Tanguy Risset
Articles de Journaux
  1. C. TayouDjamegni, P. Quinton, S. Rajopadhye, T. Risset. Derivation of Systolic Algorithms for the Algebraic Path Problem by Recurrence Transformations.  Parallel Computing, 2000. (postscript)
  2. E. Mémin, T. Risset. VLSI Design Methodology for Edge-Preserving Image Reconstruction.  Real-Time Imaging, Special issue on Fast Energy Minimization-Based Imaging and Vision Techniques, 2000. (postscript)
  3. E. Mémin, T. Risset. On the Study of VLSI Derivation for Optical Flow Estimation.  International Journal of pattern recognition and Artificial Intelligence (IJPRAI), 2000. (postscript)
  4. P. Quinton, S.V. Rajopadhye, T. Risset. On Manipulating Z-polyhedra using a Canonical Representation.  Parallel Processing Letters, 7(2):181-194, Juin 1997. (postscript)
  5. M. Dion, T. Risset, Y. Robert. Ressource-Constrained Scheduling of Partitioned Algorithms on Processor Arrays.  Integration the VLSI journal, 20:139-159, 1996. (postscript)
  6. J.F. Collard, P. Feautrier, T. Risset. Construction of DO Loops from Systems of Affine Constraints.  Parallel Processing Letters, 5:421-436, 1995. (postscript)
  7. P. Boulet, A. Darte, T. Risset, Y. Robert. (Pen)-Ultimate Tiling?.  Integration, 17:33-51, Novembre 1994. (postscript)
  8. T. Risset, Y. Robert. Synthesis of Processor Arrays for the Algebraic Path Problem: Unifying Old Results and Deriving New Architectures.  Parallel Processing Letters, 1:19-28, 1991.
  9. T. Risset. Implementing Gaussian Elimination on a Matrix-Matrix Multiplication Systolic Array.  Parallel Computing, 16:351-359, 1990.
Chapitres de livres
  1. T. Gautier, P. LeGuernic, P. Quinton, S. Rajopadhye, T. Risset, I. Smarandache. Le projet Cairn : vers la conception d'architectures à partir de Signal et Alpha.  in Collection Technique et scientifique des Télécommunications, CNET, 1997.
  2. A. Darte, T. Risset, Y. Robert. Application-Driven Architecture synthesis.  in , Chapitre 3: Formal Methods for Solving the Algrebraic Path Problem, Kluwer Academic Publishers, 1993.
Conférences Internationales
  1. A.C. Guillou, P. Quinton, T. Risset. Automatic Design of VLSI Pipelined LMS Architectures.  2000 IEEE Canadian Conference on Electrical & Computer Engineering, Trois Rivières, Canada, Août 2000. (postscript)
  2. T. Risset, D. Derrien. Interfacing Compiled FPGA Programs: the MMAlpha Approach.  Second International Workshop on Engineering of Reconfigurable Hardware/Software Objects, Int. conf. on Parallel and Distributed Processing Techniques and Applications (PDPTA), CSREA Press, Juin 2000. (postscript)
  3. S. Rajopadhye, T. Risset, C. Tadonki. The Algebraic Path Problem Revisited.  Fifth International Euro-Par Conference, pages 698-707, Toulouse, France, Août 1999. (postscript)
  4. T. Risset, Y. Saouter. Synthèse de haut niveau d'un co-processeur pour le calcul des bases de Grobner.  5eme Symposium en architecture nouvelles de machines (Sympa'5), Rennes, Juin 1999. (postscript)
  5. A. Mozipo, D. Massicote, P. Quinton, T. Risset. A Parallel Architecture for Adaptative Channel Equalization Based On Kalman Filter Using MMAlpha.  1999 IEEE Canadian Conference on Electrical & Computer Engineering, Edmonton, Canada, Mai 1999. (postscript)
  6. E. Mémin, T. Risset. Full Alternate Jacobi Minimization and VLSI Derivation of Hardware for Motion Estimation.  Int. Workshop on Parallel Image Processing and Analysis, IWPIPA'99, Madras, India, Janvier 1999. (postscript)
  7. A. Mozipo, D. Massicotte, P. Quinton, T. Risset. Automatic Synthesis of a Parallel Architecture for Kalman Filtering using MMAlpha.  International Conference on Parallel Computing in Electrical Engineering (PARELEC 98), pages 201-206, Bialystok, Poland, Septembre 1998. (postscript)
  8. S. Balev, P. Quinton, S.V. Rajopadhye, T. Risset. Linear Programming Models for Scheduling Systems of Affine Recurrence Equations - a Comparative Study -.  10th ACM Symposium on Parallel Algorithms and Architectures (SPAA), 1998. (postscript)
  9. F. DupontdeDinechin, T. Risset, S. Robert. Hierarchical Static Analysis for Improving the Complexity of Linear Algebra Algorithms.  Internationnal Conference on Parallel Computing (PARCO, 1997. (postscript)
  10. P. LeMoenner, L. Perraudeau, S. Rajopadhye, T. Risset, P. Quinton. Generating Regular Arithmetic Circuits with AlpHard.  Massively Parallel Computing Systems (MPCS'96), Mai 1996. (postscript)
  11. P. Quinton, S.V. Rajopadhye, T. Risset. Extension of the Alpha Language to Recurrences on Sparse Periodic Domains.  Int. Conf. on Application Specific Array Processors, IEEE Computer Society Press, pages 391-401, Chicago, Illinois, 1996. (postscript)
  12. P.Y. Calland, T. Risset. Precise Tiling for Uniform Loop Nests.  Application Specific Array Processors, IEEE Computer Society Press, pages 330-337, 1995. (postscript)
  13. F DupontDeDinechin, P. Quinton, T. Risset. Structuration of the Alpha Language.  Massively Parallel Programming Models, W.K. Giloi, S. Jahnichen, B.D. Shriver (eds.), IEEE Computer Society Press, pages 18-24, 1995. (postscript)
  14. M. Dion, T. Risset, Y. Robert. Resource-constrained scheduling of partitioned algorithms on processor arrays.  EuroMicro Workshop on Parallel and Distributed Processing, IEEE Computer Society Press, pages 571-580, 1995.
  15. P Boulet, A. Darte, T. Risset, Y. Robert. (Pen)-U.  Scalable High-Performance Computing Conference, Mai 1994. (postscript)
  16. T. Risset. Applying Semi-Systolic Techniques to SIMD Programming.  Applications in Parallel and Distributed Computing (IFIP Transactions), C. Girault (ed.), North-Holland, pages 103-112, 1994. (postscript)
  17. T. Risset, S.BOOKTITLE=APPLICATIONSPECIFICARRAYPROCESSORS Song. A Real Time Systolic Algorithm for On-the-fly Hidden Surface Removal.  , IEEE Computer Society Press, pages 238-249, 1993.
  18. A. Darte, T. Risset, Y. Robert. Loop Nest Scheduling and Transformations.  Environments and tools for parallel scientific computing, North-Holland, pages 309-332, 1993.
  19. T. Risset. A Method to Synthesize Modular Systolic Arrays With Local Broadcast Facility.  Application Specific Array Processors, IEEE Computer Society Press, pages 415-428, 1992.
  20. T. Risset. Linear Systolic Arrays for Matrix Multiplication: Comparisons of Existing Methods and New Results.  Proc. 2nd Workshop on Algorithms and VLSI parallel architecture, 1991.
  21. T. Risset, Y. Robert. Uniform but Non-Local DAGs: a Trade-off between Pure Systolic and SIMD Solutions.  Application Specific Array Processors, IEEE Computer Society Press, pages 296-308, 1991.
  22. A. Darte, Y. Robert, T. Risset. Systolic Systems.  2nd IEE Int. Specialist Seminar on Parallel Digital Processors, P.J. Hargraven (ed.), IEEE Press, IEEE Conference Publication, Volume 334, pages 6-10, 1991.
  23. A. Darte, T. Risset, Y Robert. Synthesizing Systolic Arrays: some Recent Developments.  Application Specific Array Processors, IEEE Computer Society Press, pages 372-386, 1991.
Rapports de recherche
  1. D. Cachera, S. Rajopadhye, T. Risset, C. Tadonki. Parallelization of the Algebraic Path Problem on Linear SIMD/SPMD.  Rapport de Recherche Irisa, No1346, 2000.
  2. M Manjunathaiah, S. Rajopadhye, T. Risset. Uniformization Tool for Systolic Array Designs.  Rapport de Recherche Irisa, No1350, 2000.
  3. S.P.K. Nookala, T. Risset. A Library for Z-polyhedral Operations.  Rapport de Recherche Irisa, No1330, 2000. (postscript)
  4. F. Bardoult, P. Quinton, S. Rajopadhye, T. Risset. Synthesis of data-flow interfaces for regular parallel programs.  Rapport de Recherche Irisa, No1260, Septembre 1999. (postscript)
  5. F. DupontdeDinechin, P. Quinton, S. Rajopadhye, T. Risset. First Steps in Alpha.  Rapport de Recherche Irisa, No1244, 1999. (postscript)
  6. T. Risset, F. DupontdeDinechin, S. Robert. Structured Scheduling of Reccurence Equations.  Rapport de Recherche IRISA, No1140, 1997. (postscript)
  7. T. Risset, Y. Saouter. A Linear Systolic Array for the Computation of Gröbner Basis.  Rapport de Recherche Irisa, No1069, 1996. (postscript)

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