Tiling, the Universal Optimization
Larry Carter
UCSD and San Diego Supercomputer Center
Tiling is a method of improving performance of a program by
partitioning the program's ISG (Iteration Space Graph) into similar
pieces for atomic execution on a computer with a hierarchy of
processors and memory.
In this talk, I visit each of the italicized phrases twice. The first
pass gives a limited meaning to each term, and is intended to be
non-controversial. The second pass expands the definitions and makes the
argument that a broad range of optimization techniques are, in
essence, tiling. We argue that tiling should consider storage mapping,
scheduling, and communication pipelining decisions; that it
encompasses inspector/executor methods; that it can facilitate
register allocation, storage compaction, instruction cache
optimization, fault tolerance, and adaptive computing on heterogeneous
platforms; and so on.
This is joint work with everyone who has ever improved the performance
of a program, and in particular with Bowen Alpern, Jeanne Ferrante,
Susan Flynn Hummel, Kang Su Gatlin, Karin Hogstedt, and Nick Mitchell.
Further info and related paper(s):