The Alpha Language
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A Langage for the Synthesis of Regular Architectures
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Alpha is a functional language for
expressing regular algorithms, synthesizing regular architectures or
compiling to sequential or parallel machines from a high level
specification. An algorithm is described by equations involving
variables defined on multi-dimensional domains. By successive
transformations (uniformization, parallelization for instance), the
description is refined until it may be interpreted as an
architecture. Then, this description can be translated towards logic
synthesis tools in order to generate a VLSI
architecture. Alternatively, different analyses (scheduling, lifetime,
etc.) may guide the transformations towards imperative loop code for
general purpose (sequential or parallel) processors. This basic
scheme allows one to investigate many important research topics
(parallelization, code generation, language semantics, convex
polyhedra calculus, abstract and non-standard interpretation,
program verification, optimization, architecture synthesis, VLSI, FPGA,
systolic arrays, etc.).
Last modification of this page: July 2010