Assia DJABELKHIR
Assia DJABELKHIR |
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IRISA
Campus de Beaulieu
35042 RENNES Cedex
FRANCE
phone:+33 2 99 84 73 37
fax : +33 2 99 84 25 28
Since october 2001, I am PhD student within the CAPS project. My research advisor is Andre SEZNEC.
Needs of embedded applications in terms of performance and flexibility in programming increase in parallel with integration possibilities, and will lead to the use of dynamic execution on embedded processors in the next few years. However, complete-out-of-order superscalar cores are still expensive in terms of silicon area and power dissipation. This work focus on studying a more limited form of dynamic execution, namely decoupled architecture, to embedded applications.
Decoupled architecture is known to work very efficiently whenever the execution does not suffer from inter-processor dependencies causing some loss of decoupling, called LOD events. In a first step of this study [1], we addressed regularity of embedded codes in terms of the LOD events that may occur.
[1] A. Djabelkhir, A. Seznec, ``Characterization of embedded applications for decoupled processor architecture'', in Proceedings of the IEEE 6th Annual Workshop on Workload Characterization, austin, TX, October 2003.